changeset 6756:d89441a9ce98 icedtea-2.6.21 icedtea-2.6.22pre00

8135018, PR3774: AARCH64: Missing memory barriers for CMS collector Summary: Add StoreStore barrier when CMS needs them Reviewed-by: tschatzl
author aph
date Thu, 06 Feb 2020 02:35:53 +0000
parents 681946ff9c10
children 589dc1af9e7b
files src/cpu/aarch64/vm/assembler_aarch64.cpp src/cpu/aarch64/vm/stubGenerator_aarch64.cpp src/share/vm/c1/c1_LIRGenerator.cpp
diffstat 3 files changed, 12 insertions(+), 0 deletions(-) [+]
line wrap: on
line diff
--- a/src/cpu/aarch64/vm/assembler_aarch64.cpp	Tue Nov 12 17:54:52 2019 +0800
+++ b/src/cpu/aarch64/vm/assembler_aarch64.cpp	Thu Feb 06 02:35:53 2020 +0000
@@ -4214,6 +4214,10 @@
   // don't bother to check, but it could save an instruction.
   intptr_t disp = (intptr_t) ct->byte_map_base;
   load_byte_map_base(rscratch1);
+
+  if (UseConcMarkSweepGC && CMSPrecleaningEnabled) {
+      membar(StoreStore);
+  }
   strb(zr, Address(obj, rscratch1));
 }
 
--- a/src/cpu/aarch64/vm/stubGenerator_aarch64.cpp	Tue Nov 12 17:54:52 2019 +0800
+++ b/src/cpu/aarch64/vm/stubGenerator_aarch64.cpp	Thu Feb 06 02:35:53 2020 +0000
@@ -770,6 +770,9 @@
           const Register count = end; // 'end' register contains bytes count now
           __ load_byte_map_base(scratch);
           __ add(start, start, scratch);
+          if (UseConcMarkSweepGC) {
+            __ membar(__ StoreStore);
+          }
           __ BIND(L_loop);
           __ strb(zr, Address(start, count));
           __ subs(count, count, 1);
--- a/src/share/vm/c1/c1_LIRGenerator.cpp	Tue Nov 12 17:54:52 2019 +0800
+++ b/src/share/vm/c1/c1_LIRGenerator.cpp	Thu Feb 06 02:35:53 2020 +0000
@@ -1623,6 +1623,11 @@
   } else {
     __ unsigned_shift_right(addr, CardTableModRefBS::card_shift, tmp);
   }
+
+  if (UseConcMarkSweepGC && CMSPrecleaningEnabled) {
+    __ membar_storestore();
+  }
+
   if (can_inline_as_constant(card_table_base)) {
     __ move(LIR_OprFact::intConst(0),
               new LIR_Address(tmp, card_table_base->as_jint(), T_BYTE));