changeset 5721:a76ae712c881

8031290: Adjust call to getisax() for additional words returned 8019324: assert(_f2 == 0 || _f2 == f2) failed: illegal field change Summary: Add support for Sparc T7 and fix the assertion failure in cpCacheOop Reviewed-by: dholmes, jmasa
author poonam
date Wed, 02 Jul 2014 02:06:45 -0700
parents 18673681d3bf
children f5c552a5aa1a
files src/cpu/sparc/vm/vm_version_sparc.hpp src/os_cpu/solaris_sparc/vm/vm_version_solaris_sparc.cpp src/share/vm/oops/cpCacheOop.hpp
diffstat 3 files changed, 33 insertions(+), 9 deletions(-) [+]
line wrap: on
line diff
--- a/src/cpu/sparc/vm/vm_version_sparc.hpp	Wed Jul 02 09:20:05 2014 -0700
+++ b/src/cpu/sparc/vm/vm_version_sparc.hpp	Wed Jul 02 02:06:45 2014 -0700
@@ -48,7 +48,8 @@
     sparc64_family       = 14,
     M_family             = 15,
     T_family             = 16,
-    T1_model             = 17
+    T1_model             = 17,
+    sparc5_instructions  = 18
   };
 
   enum Feature_Flag_Set {
@@ -73,6 +74,7 @@
     M_family_m              = 1 << M_family,
     T_family_m              = 1 << T_family,
     T1_model_m              = 1 << T1_model,
+    sparc5_instructions_m   = 1 << sparc5_instructions,
 
     generic_v8_m        = v8_instructions_m | hardware_mul32_m | hardware_div32_m | hardware_fsmuld_m,
     generic_v9_m        = generic_v8_m | v9_instructions_m,
@@ -117,6 +119,7 @@
   static bool has_vis3()                { return (_features & vis3_instructions_m) != 0; }
   static bool has_blk_init()            { return (_features & blk_init_instructions_m) != 0; }
   static bool has_cbcond()              { return (_features & cbcond_instructions_m) != 0; }
+  static bool has_sparc5_instr()        { return (_features & sparc5_instructions_m) != 0; }
 
   static bool supports_compare_and_exchange()
                                         { return has_v9(); }
@@ -127,6 +130,7 @@
 
   static bool is_M_series()             { return is_M_family(_features); }
   static bool is_T4()                   { return is_T_family(_features) && has_cbcond(); }
+  static bool is_T7()                   { return is_T_family(_features) && has_sparc5_instr(); }
 
   // Fujitsu SPARC64
   static bool is_sparc64()              { return (_features & sparc64_family_m) != 0; }
@@ -146,7 +150,7 @@
   static const char* cpu_features()     { return _features_str; }
 
   static intx prefetch_data_size()  {
-    return is_T4() ? 32 : 64;  // default prefetch block size on sparc
+    return is_T4() && !is_T7() ? 32 : 64;  // default prefetch block size on sparc
   }
 
   // Prefetch
--- a/src/os_cpu/solaris_sparc/vm/vm_version_solaris_sparc.cpp	Wed Jul 02 09:20:05 2014 -0700
+++ b/src/os_cpu/solaris_sparc/vm/vm_version_solaris_sparc.cpp	Wed Jul 02 02:06:45 2014 -0700
@@ -75,13 +75,19 @@
     do_sysinfo(SI_ARCHITECTURE_64, "sparcv9", &features, generic_v9_m);
 
     // Extract valid instruction set extensions.
-    uint_t av;
-    uint_t avn = os::Solaris::getisax(&av, 1);
-    assert(avn == 1, "should only return one av");
+    uint_t avs[2];
+    uint_t avn = os::Solaris::getisax(avs, 2);
+    assert(avn <= 2, "should return two or less av's");
+    uint_t av = avs[0];
 
 #ifndef PRODUCT
-    if (PrintMiscellaneous && Verbose)
-      tty->print_cr("getisax(2) returned: " PTR32_FORMAT, av);
+    if (PrintMiscellaneous && Verbose) {
+      tty->print("getisax(2) returned: " PTR32_FORMAT, av);
+      if (avn > 1) {
+        tty->print(", " PTR32_FORMAT, avs[1]);
+      }
+      tty->cr();
+    }
 #endif
 
     if (av & AV_SPARC_MUL32)  features |= hardware_mul32_m;
@@ -91,6 +97,13 @@
     if (av & AV_SPARC_POPC)   features |= hardware_popc_m;
     if (av & AV_SPARC_VIS)    features |= vis1_instructions_m;
     if (av & AV_SPARC_VIS2)   features |= vis2_instructions_m;
+    if (avn > 1) {
+      uint_t av2 = avs[1];
+#ifndef AV2_SPARC_SPARC5
+#define AV2_SPARC_SPARC5 0x00000008 /* The 29 new fp and sub instructions */
+#endif
+      if (av2 & AV2_SPARC_SPARC5)       features |= sparc5_instructions_m;
+    }
 
     // Next values are not defined before Solaris 10
     // but Solaris 8 is used for jdk6 update builds.
--- a/src/share/vm/oops/cpCacheOop.hpp	Wed Jul 02 09:20:05 2014 -0700
+++ b/src/share/vm/oops/cpCacheOop.hpp	Wed Jul 02 02:06:45 2014 -0700
@@ -140,8 +140,15 @@
     oop_store(&_f1, f1);
   }
   void release_set_f1(oop f1);
-  void set_f2(intx f2)                           { assert(_f2 == 0 || _f2 == f2,            "illegal field change"); _f2 = f2; }
-  void set_f2_as_vfinal_method(methodOop f2)     { assert(_f2 == 0 || _f2 == (intptr_t) f2, "illegal field change"); assert(is_vfinal(), "flags must be set"); _f2 = (intptr_t) f2; }
+  void set_f2(intx f2) {
+    intx existing_f2 = _f2; // read once
+    assert(existing_f2 == 0 || existing_f2 == f2, "illegal field change");
+    _f2 = f2;
+  }
+  void set_f2_as_vfinal_method(methodOop f2) {
+    assert(is_vfinal(), "flags must be set");
+    set_f2((intx)f2);
+  }
   int make_flags(TosState state, int option_bits, int field_index_or_method_params);
   void set_flags(intx flags)                     { _flags = flags; }
   bool init_flags_atomic(intx flags);