changeset 2405:709acc7941bf

CACAO PR157: ARM SMP Assertion thinlock failed. 2011-03-11 Xerxes Ranby <xerxes@zafena.se> CACAO PR157: ARM SMP Assertion thinlock failed. * NEWS: Updated. * Makefile.am: Add new CACAO patch. * patches/cacao/arm-memory-barrier.patch: New patch.
author Xerxes R?nby <xerxes@zafena.se>
date Fri, 20 May 2011 00:08:24 +0100
parents 1a8a40f21e15
children 58b8da72031a
files ChangeLog Makefile.am NEWS patches/cacao/arm-memory-barrier.patch
diffstat 4 files changed, 54 insertions(+), 0 deletions(-) [+]
line wrap: on
line diff
--- a/ChangeLog	Thu May 19 23:39:17 2011 +0100
+++ b/ChangeLog	Fri May 20 00:08:24 2011 +0100
@@ -1,3 +1,10 @@
+2011-03-11  Xerxes Ranby  <xerxes@zafena.se>
+
+	CACAO PR157: ARM SMP Assertion thinlock failed.
+	* NEWS: Updated.
+	* Makefile.am: Add new CACAO patch.
+	* patches/cacao/arm-memory-barrier.patch: New patch.
+
 2011-03-04  Xerxes Ranby  <xerxes@zafena.se>
 
 	CACAO: Ignore all unknown options.
--- a/Makefile.am	Thu May 19 23:39:17 2011 +0100
+++ b/Makefile.am	Fri May 20 00:08:24 2011 +0100
@@ -303,6 +303,7 @@
 	patches/cacao/jsig.patch \
 	patches/cacao/6714758.patch \
 	patches/cacao/memory.patch \
+	patches/cacao/arm-memory-barrier.patch \
 	patches/cacao/ignore-unknown-options.patch
 endif
 
--- a/NEWS	Thu May 19 23:39:17 2011 +0100
+++ b/NEWS	Fri May 20 00:08:24 2011 +0100
@@ -9,6 +9,7 @@
 * Bug fixes
   - PR616, PR99: Don't statically link libstdc++
   - PR640: JamVM fails to build - Unrecognised option: -XX:ThreadStackSize.
+  - CACAO PR157: ARM SMP Assertion thinlock failed.
 * Zero/Shark
   - Match Shark in icedtea6, makes OSR work by removing vestigal check.
   - LLVM 2.7 non-product fixes.
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/patches/cacao/arm-memory-barrier.patch	Fri May 20 00:08:24 2011 +0100
@@ -0,0 +1,45 @@
+Index: cacao/cacao/src/vm/jit/arm/md-atomic.hpp
+===================================================================
+--- cacao.orig/cacao/src/vm/jit/arm/md-atomic.hpp	2011-03-04 22:44:20.000000000 +0100
++++ cacao/cacao/src/vm/jit/arm/md-atomic.hpp	2011-03-04 23:02:52.000000000 +0100
+@@ -63,13 +63,21 @@
+ 	return Atomic::generic_compare_and_swap(p, oldval, newval);
+ }
+ 
++/**
++ * ARM Kernel helper for memory barrier.
++ * Using __asm __volatile ("":::"memory") does not work reliable on ARM
++ * and gcc __sync_synchronize(); implementation does not use the kernel
++ * helper for all gcc versions so it is unreliable to use as well.
++ */
++typedef void (__kernel_dmb_t) (void);
++#define __kernel_dmb (*(__kernel_dmb_t *) 0xffff0fa0)
+ 
+ /**
+  * A memory barrier.
+  */
+ inline void memory_barrier(void)
+ {
+-	__asm__ __volatile__ ("" : : : "memory");
++	__kernel_dmb();
+ }
+ 
+ 
+@@ -78,7 +86,7 @@
+  */
+ inline void write_memory_barrier(void)
+ {
+-	__asm__ __volatile__ ("" : : : "memory");
++	__kernel_dmb();
+ }
+ 
+ 
+@@ -87,7 +95,7 @@
+  */
+ inline void instruction_barrier(void)
+ {
+-	__asm__ __volatile__ ("" : : : "memory");
++	__kernel_dmb();
+ }
+ 
+ }