--- a/ChangeLog	Wed Mar 05 08:04:00 2008 -0500
+++ b/ChangeLog	Wed Mar 05 08:28:23 2008 -0500
@@ -1,3 +1,110 @@
+2008-03-05  Gary Benson  <gbenson@redhat.com>
+
+	* ports/hotspot/src/cpu/ppc/vm/assembler_ppc.cpp: Removed.
+	* ports/hotspot/src/cpu/ppc/vm/assembler_ppc.hpp: Likewise.
+	* ports/hotspot/src/cpu/ppc/vm/assembler_ppc.inline.hpp: Likewise.
+	* ports/hotspot/src/cpu/ppc/vm/bytecodeInterpreter_ppc.cpp: Likewise.
+	* ports/hotspot/src/cpu/ppc/vm/bytecodeInterpreter_ppc.hpp: Likewise.
+	* ports/hotspot/src/cpu/ppc/vm/bytecodeInterpreter_ppc.inline.hpp:
+	Likewise.
+	* ports/hotspot/src/cpu/ppc/vm/bytecodes_ppc.cpp: Likewise.
+	* ports/hotspot/src/cpu/ppc/vm/bytecodes_ppc.hpp: Likewise.
+	* ports/hotspot/src/cpu/ppc/vm/bytes_ppc.hpp: Likewise.
+	* ports/hotspot/src/cpu/ppc/vm/c1_CodeStubs_ppc.cpp: Likewise.
+	* ports/hotspot/src/cpu/ppc/vm/c1_Defs_ppc.hpp: Likewise.
+	* ports/hotspot/src/cpu/ppc/vm/c1_FpuStackSim_ppc.cpp: Likewise.
+	* ports/hotspot/src/cpu/ppc/vm/c1_FpuStackSim_ppc.hpp: Likewise.
+	* ports/hotspot/src/cpu/ppc/vm/c1_FrameMap_ppc.cpp: Likewise.
+	* ports/hotspot/src/cpu/ppc/vm/c1_FrameMap_ppc.hpp: Likewise.
+	* ports/hotspot/src/cpu/ppc/vm/c1_LIRAssembler_ppc.cpp: Likewise.
+	* ports/hotspot/src/cpu/ppc/vm/c1_LIRAssembler_ppc.hpp: Likewise.
+	* ports/hotspot/src/cpu/ppc/vm/c1_LIRGenerator_ppc.cpp: Likewise.
+	* ports/hotspot/src/cpu/ppc/vm/c1_LinearScan_ppc.cpp: Likewise.
+	* ports/hotspot/src/cpu/ppc/vm/c1_LinearScan_ppc.hpp: Likewise.
+	* ports/hotspot/src/cpu/ppc/vm/c1_MacroAssembler_ppc.cpp: Likewise.
+	* ports/hotspot/src/cpu/ppc/vm/c1_MacroAssembler_ppc.hpp: Likewise.
+	* ports/hotspot/src/cpu/ppc/vm/c1_Runtime1_ppc.cpp: Likewise.
+	* ports/hotspot/src/cpu/ppc/vm/c1_globals_ppc.hpp: Likewise.
+	* ports/hotspot/src/cpu/ppc/vm/codeBuffer_ppc.hpp: Likewise.
+	* ports/hotspot/src/cpu/ppc/vm/copy_ppc.hpp: Likewise.
+	* ports/hotspot/src/cpu/ppc/vm/cppInterpreterGenerator_ppc.hpp:
+	Likewise.
+	* ports/hotspot/src/cpu/ppc/vm/cppInterpreter_ppc.cpp: Likewise.
+	* ports/hotspot/src/cpu/ppc/vm/cppInterpreter_ppc.hpp: Likewise.
+	* ports/hotspot/src/cpu/ppc/vm/debug_ppc.cpp: Likewise.
+	* ports/hotspot/src/cpu/ppc/vm/depChecker_ppc.cpp: Likewise.
+	* ports/hotspot/src/cpu/ppc/vm/depChecker_ppc.hpp: Likewise.
+	* ports/hotspot/src/cpu/ppc/vm/disassembler_ppc.cpp: Likewise.
+	* ports/hotspot/src/cpu/ppc/vm/disassembler_ppc.hpp: Likewise.
+	* ports/hotspot/src/cpu/ppc/vm/dump_ppc.cpp: Likewise.
+	* ports/hotspot/src/cpu/ppc/vm/frame_ppc.cpp: Likewise.
+	* ports/hotspot/src/cpu/ppc/vm/frame_ppc.hpp: Likewise.
+	* ports/hotspot/src/cpu/ppc/vm/frame_ppc.inline.hpp: Likewise.
+	* ports/hotspot/src/cpu/ppc/vm/globalDefinitions_ppc.hpp: Likewise.
+	* ports/hotspot/src/cpu/ppc/vm/globals_ppc.hpp: Likewise.
+	* ports/hotspot/src/cpu/ppc/vm/icBuffer_ppc.cpp: Likewise.
+	* ports/hotspot/src/cpu/ppc/vm/icache_ppc.cpp: Likewise.
+	* ports/hotspot/src/cpu/ppc/vm/icache_ppc.hpp: Likewise.
+	* ports/hotspot/src/cpu/ppc/vm/interp_masm_ppc.cpp: Likewise.
+	* ports/hotspot/src/cpu/ppc/vm/interp_masm_ppc.hpp: Likewise.
+	* ports/hotspot/src/cpu/ppc/vm/interpreterGenerator_ppc.hpp: Likewise.
+	* ports/hotspot/src/cpu/ppc/vm/interpreterRT_ppc.cpp: Likewise.
+	* ports/hotspot/src/cpu/ppc/vm/interpreterRT_ppc.hpp: Likewise.
+	* ports/hotspot/src/cpu/ppc/vm/interpreter_ppc.cpp: Likewise.
+	* ports/hotspot/src/cpu/ppc/vm/interpreter_ppc.hpp: Likewise.
+	* ports/hotspot/src/cpu/ppc/vm/javaFrameAnchor_ppc.hpp: Likewise.
+	* ports/hotspot/src/cpu/ppc/vm/jniFastGetField_ppc.cpp: Likewise.
+	* ports/hotspot/src/cpu/ppc/vm/jniTypes_ppc.hpp: Likewise.
+	* ports/hotspot/src/cpu/ppc/vm/nativeInst_ppc.cpp: Likewise.
+	* ports/hotspot/src/cpu/ppc/vm/nativeInst_ppc.hpp: Likewise.
+	* ports/hotspot/src/cpu/ppc/vm/registerMap_ppc.hpp: Likewise.
+	* ports/hotspot/src/cpu/ppc/vm/register_definitions_ppc.cpp: Likewise.
+	* ports/hotspot/src/cpu/ppc/vm/register_ppc.cpp: Likewise.
+	* ports/hotspot/src/cpu/ppc/vm/register_ppc.hpp: Likewise.
+	* ports/hotspot/src/cpu/ppc/vm/relocInfo_ppc.cpp: Likewise.
+	* ports/hotspot/src/cpu/ppc/vm/relocInfo_ppc.hpp: Likewise.
+	* ports/hotspot/src/cpu/ppc/vm/sharedRuntime_ppc.cpp: Likewise.
+	* ports/hotspot/src/cpu/ppc/vm/stubGenerator_ppc.cpp: Likewise.
+	* ports/hotspot/src/cpu/ppc/vm/stubRoutines_ppc.cpp: Likewise.
+	* ports/hotspot/src/cpu/ppc/vm/stubRoutines_ppc.hpp: Likewise.
+	* ports/hotspot/src/cpu/ppc/vm/templateInterpreterGenerator_ppc.hpp: 
+	Likewise.
+	* ports/hotspot/src/cpu/ppc/vm/templateInterpreter_ppc.cpp: Likewise.
+	* ports/hotspot/src/cpu/ppc/vm/templateInterpreter_ppc.hpp: Likewise.
+	* ports/hotspot/src/cpu/ppc/vm/templateTable_ppc.cpp: Likewise.
+	* ports/hotspot/src/cpu/ppc/vm/templateTable_ppc.hpp: Likewise.
+	* ports/hotspot/src/cpu/ppc/vm/vmStructs_ppc.hpp: Likewise.
+	* ports/hotspot/src/cpu/ppc/vm/vm_version_ppc.cpp: Likewise.
+	* ports/hotspot/src/cpu/ppc/vm/vm_version_ppc.hpp: Likewise.
+	* ports/hotspot/src/cpu/ppc/vm/vmreg_ppc.cpp: Likewise.
+	* ports/hotspot/src/cpu/ppc/vm/vmreg_ppc.hpp: Likewise.
+	* ports/hotspot/src/cpu/ppc/vm/vmreg_ppc.inline.hpp: Likewise.
+	* ports/hotspot/src/cpu/ppc/vm/vtableStubs_ppc.cpp: Likewise.
+	* ports/hotspot/src/os_cpu/linux_ppc/vm/assembler_linux_ppc.cpp:
+	Likewise.
+	* ports/hotspot/src/os_cpu/linux_ppc/vm/atomic_linux_ppc.inline.hpp:
+	Likewise.
+	* ports/hotspot/src/os_cpu/linux_ppc/vm/bytes_linux_ppc.inline.hpp:
+	Likewise.
+	* ports/hotspot/src/os_cpu/linux_ppc/vm/globals_linux_ppc.hpp:
+	Likewise.
+	* ports/hotspot/src/os_cpu/linux_ppc/vm/orderAccess_linux_ppc.inline.hpp:
+	Likewise.
+	* ports/hotspot/src/os_cpu/linux_ppc/vm/os_linux_ppc.cpp: Likewise.
+	* ports/hotspot/src/os_cpu/linux_ppc/vm/os_linux_ppc.hpp: Likewise.
+	* ports/hotspot/src/os_cpu/linux_ppc/vm/prefetch_linux_ppc.inline.hpp:
+	Likewise.
+	* ports/hotspot/src/os_cpu/linux_ppc/vm/threadLS_linux_ppc.cpp:
+	Likewise.
+	* ports/hotspot/src/os_cpu/linux_ppc/vm/threadLS_linux_ppc.hpp:
+	Likewise.
+	* ports/hotspot/src/os_cpu/linux_ppc/vm/thread_linux_ppc.cpp: Likewise.
+	* ports/hotspot/src/os_cpu/linux_ppc/vm/thread_linux_ppc.hpp: Likewise.
+	* ports/hotspot/src/os_cpu/linux_ppc/vm/vmStructs_linux_ppc.hpp:
+	Likewise.
+	* ports/hotspot/src/os_cpu/linux_ppc/vm/vm_version_linux_ppc.cpp:
+	Likewise.
+
 2008-03-05  Gary Benson  <gbenson@redhat.com>
 
 	* ports/hotspot/src/os_cpu/linux_zero/vm/globals_linux_zero.hpp

--- a/ports/hotspot/src/cpu/ppc/vm/assembler_ppc.cpp	Wed Mar 05 08:04:00 2008 -0500
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,1472 +0,0 @@
-/*
- * Copyright 2003-2007 Sun Microsystems, Inc.  All Rights Reserved.
- * Copyright 2007 Red Hat, Inc.
- * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
- *
- * This code is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 only, as
- * published by the Free Software Foundation.
- *
- * This code is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
- * version 2 for more details (a copy is included in the LICENSE file that
- * accompanied this code).
- *
- * You should have received a copy of the GNU General Public License version
- * 2 along with this work; if not, write to the Free Software Foundation,
- * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
- * CA 95054 USA or visit www.sun.com if you need additional information or
- * have any questions.
- *
- */
-
-#include "incls/_precompiled.incl"
-#include "incls/_assembler_ppc.cpp.incl"
-
-
-// Fill empty space with zeros.
-// (0x00000000 is an illegal instruction on ppc)
-
-int AbstractAssembler::code_fill_byte()
-{
-  return 0x00;
-}
-
-// Instruction emitters for the various forms.
-// Every instruction should ultimately come through one of these.
-
-void Assembler::emit_instruction(int opcode, int li, bool aa, bool lk)
-{
-  // I-form
-  assert(!(opcode & ~0x3f), "invalid opcode");
-  assert(!(li & ~0xffffff), "invalid operand");
-  emit_long(opcode << 26 | li << 2 | aa << 1 | lk);
-}
-void Assembler::emit_instruction(int opcode, int bo, int bi, int bd,
-                                 bool aa, bool lk) {
-  // B-form (includes SC-form)
-  assert(!(opcode & ~0x3f), "invalid opcode");
-  assert(!(bo & ~0x1f),     "invalid operand");
-  assert(!(bi & ~0x1f),     "invalid operand");
-  assert(!(bd & ~0x3fff),   "invalid operand");
-  emit_long(opcode << 26 | bo << 21 | bi << 16 | bd << 2 | aa << 1 | lk);
-}
-void Assembler::emit_instruction(int opcode, int a, int b, int c)
-{
-  // D-form
-  assert(!(opcode & ~0x3f), "invalid opcode");
-  assert(!(a & ~0x1f),      "invalid operand");
-  assert(!(b & ~0x1f),      "invalid operand");
-  if (c < 0) {
-    assert((c & ~0xffff) == ~0xffff, "invalid operand");
-    c &= 0xffff;
-  }
-  else
-    assert(!(c & ~0xffff),  "invalid operand");
-  emit_long(opcode << 26 | a << 21 | b << 16 | c);
-}
-void Assembler::emit_instruction(int opcode, int a, int b, int c, int d)
-{
-  // DS-form
-  assert(!(opcode & ~0x3f), "invalid opcode");
-  assert(!(a & ~0x1f),      "invalid operand");
-  assert(!(b & ~0x1f),      "invalid operand");
-  if (c < 0) {
-    assert((c & ~0x3fff) == ~0x3fff, "invalid operand");
-    c &= 0x3fff;
-  }
-  else
-    assert(!(c & ~0x3fff), "invalid operand");
-  assert(!(d & ~0x3),       "invalid operand");
-  emit_long(opcode << 26 | a << 21 | b << 16 | c << 2 | d);
-}
-void Assembler::emit_instruction(int opcode, int a, int b, int c, int xo,
-                                 bool rc) {
-  // X-form
-  assert(!(opcode & ~0x3f), "invalid opcode");
-  assert(!(a & ~0x1f),      "invalid operand");
-  assert(!(b & ~0x1f),      "invalid operand");
-  assert(!(c & ~0x1f),      "invalid operand");
-  assert(!(xo & ~0x3ff),    "invalid operand");
-  emit_long(opcode << 26 | a << 21 | b << 16 | c << 11 | xo << 1 | rc);
-}
-void Assembler::emit_instruction(int opcode, int a, int b, int c, int d,
-                                 int e, bool rc) {
-  switch (opcode) {
-  case 21:
-    // M-form
-    assert(!(a & ~0x1f),    "invalid operand");
-    assert(!(b & ~0x1f),    "invalid operand");
-    assert(!(c & ~0x1f),    "invalid operand");
-    assert(!(d & ~0x1f),    "invalid operand");
-    assert(!(e & ~0x1f),    "invalid operand");
-    break;
-
-  case 30:
-    // MD-form
-    assert(!(a & ~0x1f),    "invalid operand");
-    assert(!(b & ~0x1f),    "invalid operand");
-    assert(!(c & ~0x3f),    "invalid operand");
-    assert(!(d & ~0x3f),    "invalid operand");
-    assert(!(e & ~0x07),    "invalid operand");
-    {
-      int C = c & 0x1f;
-      int D = d & 0x1f;
-      int E = (d & 0x20) >> 1 | e << 1 | (c & 0x20) >> 5;
-
-      c = C; d = D; e = E;
-    }
-    break;
-
-  default:
-    ShouldNotReachHere();
-  }
-  emit_long(opcode << 26 | a << 21 | b << 16 | c << 11 | d << 6 | e << 1 | rc);
-}
-
-// Wrappers for the instruction emitters.
-// These handle casting and stuff.
-
-void Assembler::emit_instruction(int opcode, Register a, Register b, int c)
-{
-  emit_instruction(opcode, a->encoding(), b->encoding(), c);
-}
-void Assembler::emit_instruction(int opcode, Register a, Register b, int c,
-                                 int d) {
-  emit_instruction(opcode, a->encoding(), b->encoding(), c, d);
-}
-void Assembler::emit_instruction(int opcode, FloatRegister a, Register b,
-                                 int c) {
-  emit_instruction(opcode, a->encoding(), b->encoding(), c);
-}
-void Assembler::emit_instruction(int opcode, Register a, const Address& b)
-{
-  emit_instruction(opcode, a, b.base(), b.displacement());
-}
-void Assembler::emit_instruction(int opcode, Register a, const Address& b,
-                                 int c) {
-  emit_instruction(opcode, a, b.base(), b.displacement() >> 2, c);
-}
-void Assembler::emit_instruction(int opcode, FloatRegister a, const Address& b)
-{
-  emit_instruction(opcode, a, b.base(), b.displacement());
-}
-void Assembler::emit_instruction(int opcode, Register a, int b, int c,
-                                 int xo, bool rc) {
-  emit_instruction(opcode, a->encoding(), b, c, xo, rc);
-}
-void Assembler::emit_instruction(int opcode, Register a,  Register b,
-                                 Register c, int xo, bool rc) {
-  emit_instruction(opcode, a->encoding(), b->encoding(), c->encoding(),
-                   xo, rc);
-}
-void Assembler::emit_instruction(int opcode, Register a,
-                                 SpecialPurposeRegister b, int c, int xo,
-                                 bool rc) {
-  emit_instruction(opcode, a->encoding(), b->encoding(), c, xo, rc);
-}
-void Assembler::emit_instruction(int opcode, SpecialPurposeRegister a,
-                                 Register b, int c, int xo, bool rc) {
-  emit_instruction(opcode, a->encoding(), b->encoding(), c, xo, rc);
-}
-void Assembler::emit_instruction(int opcode, Register a, Register b,
-                                 int c, int d, int e, bool rc) {
-  emit_instruction(opcode, a->encoding(), b->encoding(), c, d, e, rc);
-}
-void Assembler::emit_instruction(int opcode, int a, Register b, Register c,
-                                 int d, bool rc) {
-  emit_instruction(opcode, a, b->encoding(), c->encoding(), d, rc);
-}
-void Assembler::emit_instruction(int opcode, ConditionRegister a, bool l,
-                                 Register b, Register c, int d, bool rc) {
-  emit_instruction(opcode, a->encoding() << 2 | l, b, c, d, rc);
-}
-void Assembler::emit_instruction(int opcode, ConditionRegister a, bool l,
-                                 Register b, int c) {
-  emit_instruction(opcode, a->encoding() << 2 | l, b->encoding(), c);
-}
-void Assembler::emit_instruction(int opcode, FloatRegister a, int b,
-                                 FloatRegister c, int xo, bool rc) {
-  emit_instruction(opcode, a->encoding(), b, c->encoding(), xo, rc);
-}
-
-// Helpers for computing branch targets
-
-intptr_t Assembler::branch_target(address branch, address target, int bits)
-{
-  assert(!((intptr_t) branch & 3), "invalid address");
-  assert(!((intptr_t) target & 3), "invalid address");
-
-  intptr_t disp = ((intptr_t) target - (intptr_t) branch) >> 2;
-
-  intptr_t mask = (1 << bits) - 1;
-  intptr_t msb = 1 << (bits - 1);
-
-  if (disp & msb) {
-    assert((disp & ~mask) == ~mask, "invalid displacement");
-    disp &= mask;
-  }
-  else {
-    assert(!(disp & ~mask), "invalid displacement");
-  }
-  return disp;
-}
-
-// Instructions common to 32- and 64-bit implementations
-
-void Assembler::add(Register dst, Register a, Register b)
-{
-  emit_instruction(31, dst, a, b, 266, false);
-}
-void Assembler::addi(Register dst, Register a, int b)
-{
-  emit_instruction(14, dst, a, b);
-}
-void Assembler::addis(Register dst, Register a, int b)
-{
-  emit_instruction(15, dst, a, b);
-}
-void Assembler::andi_(Register dst, Register a, int b)
-{
-  emit_instruction(28, a, dst, b);
-}
-void Assembler::b(address a)
-{
-  emit_instruction(18, branch_target(pc(), a, 24), false, false);
-}
-void Assembler::bc(int bo, int bi, address a)
-{
-  emit_instruction(16, bo, bi, branch_target(pc(), a, 14), false, false);
-}
-void Assembler::bcctrl(int bo, int bi)
-{
-  emit_instruction(19, bo, bi, 0, 528, true);
-}
-void Assembler::bcl(int bo, int bi, address a)
-{
-  emit_instruction(16, bo, bi, branch_target(pc(), a, 14), false, true);
-}
-void Assembler::bclr(int bo, int bi)
-{
-  emit_instruction(19, bo, bi, 0, 16, false);
-}
-void Assembler::bclrl(int bo, int bi)
-{
-  emit_instruction(19, bo, bi, 0, 16, true);
-}
-void Assembler::bl(address a)
-{
-  emit_instruction(18, branch_target(pc(), a, 24), false, true);
-}
-void Assembler::cmp(ConditionRegister dst, bool l, Register a, Register b)
-{
-  emit_instruction(31, dst, l, a, b, 0, false);
-}
-void Assembler::cmpi(ConditionRegister dst, bool l, Register a, int b)
-{
-  emit_instruction(11, dst, l, a, b);
-}
-void Assembler::dcbf(Register a, Register b)
-{
-  emit_instruction(31, 0, a, b, 86, false);
-}
-void Assembler::extsb(Register dst, Register src)
-{
-  emit_instruction(31, src, dst, 0, 954, false);
-}
-void Assembler::extsh(Register dst, Register src)
-{
-  emit_instruction(31, src, dst, 0, 922, false);
-}
-void Assembler::fmr(FloatRegister dst, FloatRegister src)
-{
-  emit_instruction(63, dst, 0, src, 72, false);
-}
-void Assembler::icbi(Register a, Register b)
-{
-  emit_instruction(31, 0, a, b, 982, false);
-}
-void Assembler::isync()
-{
-  emit_instruction(19, 0, 0, 0, 150, false);
-}
-void Assembler::lbzx(Register dst, Register a, Register b)
-{
-  emit_instruction(31, dst, a, b, 87, false);
-}
-void Assembler::lfd(FloatRegister dst, const Address& src)
-{
-  emit_instruction(50, dst, src);
-}
-void Assembler::lfs(FloatRegister dst, const Address& src)
-{
-  emit_instruction(48, dst, src);
-}
-void Assembler::lhz(Register dst, const Address& src)
-{
-  emit_instruction(40, dst, src);
-}
-void Assembler::lhzx(Register dst, Register a, Register b)
-{
-  emit_instruction(31, dst, a, b, 279, false);
-}
-void Assembler::lwarx(Register dst, Register a, Register b)
-{
-  emit_instruction(31, dst, a, b, 20, false);
-}
-void Assembler::lwz(Register dst, const Address& src)
-{
-  emit_instruction(32, dst, src);
-}
-void Assembler::lwzx(Register dst, Register a, Register b)
-{
-  emit_instruction(31, dst, a, b, 23, false);
-}
-void Assembler::mfcr(Register dst)
-{
-  emit_instruction(31, dst, 0, 0, 19, false);
-}
-void Assembler::mfspr(Register dst, SpecialPurposeRegister src)
-{
-  emit_instruction(31, dst, src, 0, 339, false);
-}
-void Assembler::mtcrf(int mask, Register src)
-{
-  emit_instruction(31, src, (mask & 0xf0) >> 4, (mask & 0xf) << 1, 144, false);
-}
-void Assembler::mtspr(SpecialPurposeRegister dst, Register src)
-{
-  emit_instruction(31, src, dst, 0, 467, false);
-}
-void Assembler::neg(Register dst, Register src)
-{
-  emit_instruction(31, dst, src, 0, 104, false);
-}
-void Assembler::OR(Register dst, Register a, Register b)
-{
-  emit_instruction(31, a, dst, b, 444, false);
-}
-void Assembler::ori(Register dst, Register a, int b)
-{
-  emit_instruction(24, a, dst, b);
-}
-void Assembler::oris(Register dst, Register a, int b)
-{
-  emit_instruction(25, a, dst, b);
-}
-void Assembler::rlwinm(Register dst, Register a, int b, int mb, int me)
-{
-  emit_instruction(21, a, dst, b, mb, me, false);
-}
-void Assembler::stfd(FloatRegister src, const Address& dst)
-{
-  emit_instruction(54, src, dst);
-}
-void Assembler::stfs(FloatRegister src, const Address& dst)
-{
-  emit_instruction(52, src, dst);
-}
-void Assembler::stw(Register src, const Address& dst)
-{
-  emit_instruction(36, src, dst);
-}
-void Assembler::stwcx_(Register src, Register a, Register b)
-{
-  emit_instruction(31, src, a, b, 150, true);
-}
-void Assembler::stwu(Register src, const Address& dst)
-{
-  emit_instruction(37, src, dst);
-}
-void Assembler::stwux(Register src, Register a, Register b)
-{
-  emit_instruction(31, src, a, b, 183, false);
-}
-void Assembler::stwx(Register src, Register a, Register b)
-{
-  emit_instruction(31, src, a, b, 151, false);
-}
-void Assembler::subf(Register dst, Register a, Register b)
-{
-  emit_instruction(31, dst, a, b, 40, false);
-}
-void Assembler::subfic(Register dst, Register a, int b)
-{
-  emit_instruction(8, dst, a, b);
-}
-void Assembler::sync()
-{
-  emit_instruction(31, 0, 0, 0, 598, false);
-}
-
-// Instructions for 64-bit implementations only
-#ifdef PPC64
-void Assembler::extsw(Register dst, Register src)
-{
-  emit_instruction(31, src, dst, 0, 986, false);
-}
-void Assembler::ld(Register dst, const Address& src)
-{
-  emit_instruction(58, dst, src, 0);
-}
-void Assembler::ldarx(Register dst, Register a, Register b)
-{
-  emit_instruction(31, dst, a, b, 84, false);
-}
-void Assembler::ldx(Register dst, Register a, Register b)
-{
-  emit_instruction(31, dst, a, b, 21, false);
-}
-void Assembler::rldicl(Register dst, Register a, int sh, int mb)
-{
-  emit_instruction(30, a, dst, sh, mb, 0, false);
-}
-void Assembler::rldicr(Register dst, Register a, int sh, int me)
-{
-  emit_instruction(30, a, dst, sh, me, 1, false);
-}
-void Assembler::std(Register src, const Address& dst)
-{
-  emit_instruction(62, src, dst, 0);
-}
-void Assembler::stdcx_(Register src, Register a, Register b)
-{
-  emit_instruction(31, src, a, b, 214, true);
-}
-void Assembler::stdu(Register src, const Address& dst)
-{
-  emit_instruction(62, src, dst, 1);
-}
-void Assembler::stdux(Register src, Register a, Register b)
-{
-  emit_instruction(31, src, a, b, 181, false);
-}
-void Assembler::stdx(Register src, Register a, Register b)
-{
-  emit_instruction(31, src, a, b, 149, false);
-}
-#endif // PPC64
-
-// Standard mnemonics common to 32- and 64-bit implementations
-
-void Assembler::bctrl()
-{
-  bcctrl(20, 0);
-}
-void Assembler::bdnz(Label& l)
-{
-  bc(16, 0, l);
-}
-void Assembler::beq(Label& l)
-{
-  bc(12, 2, l);
-}
-void Assembler::beqlr()
-{
-  bclr(12, 2);
-}
-void Assembler::bge(Label& l)
-{
-  bc(4, 0, l);
-}
-void Assembler::bgt(Label& l)
-{
-  bc(12, 1, l);
-}
-void Assembler::ble(Label& l)
-{
-  bc(4, 1, l);
-}
-void Assembler::blelr()
-{
-  bclr(4, 1);
-}
-void Assembler::blr()
-{
-  bclr(20, 0);
-}
-void Assembler::blrl()
-{
-  bclrl(20, 0);
-}
-void Assembler::blt(Label& l)
-{
-  bc(12, 0, l);
-}
-void Assembler::bne(Label& l)
-{
-  bne(cr0, l);
-}
-void Assembler::bne(ConditionRegister r, Label& l)
-{
-  bc(4, (r->encoding() << 2) | 2, l);
-}
-void Assembler::cmpw(ConditionRegister dst, Register a, Register b)
-{
-  cmp(dst, false, a, b);
-}
-void Assembler::cmpwi(ConditionRegister dst, Register a, int b)
-{
-  cmpi(dst, false, a, b);
-}
-void Assembler::la(Register dst, Address value)
-{
-  addi(dst, value.base(), value.displacement());
-}
-void Assembler::li(Register dst, int value)
-{
-  addi(dst, 0, value);
-}
-void Assembler::lis(Register dst, int value)
-{
-  addis(dst, 0, value);
-}
-void Assembler::mr(Register dst, Register src)
-{
-  OR(dst, src, src);
-}
-void Assembler::mfctr(Register dst)
-{
-  mfspr(dst, ctr);
-}
-void Assembler::mflr(Register dst)
-{
-  mfspr(dst, lr);
-}
-void Assembler::mtcr(Register src)
-{
-  mtcrf(0xff, src);
-}
-void Assembler::mtctr(Register src)
-{
-  mtspr(ctr, src);
-}
-void Assembler::mtlr(Register src)
-{
-  mtspr(lr, src);
-}
-void Assembler::nop()
-{
-  ori(r0, r0, 0);
-}
-void Assembler::slwi(Register dst, Register a, int b)
-{
-  rlwinm(dst, a, b, 0, 31 - b);
-}
-void Assembler::srwi(Register dst, Register a, int b)
-{
-  rlwinm(dst, a, 32 - b, b, 31);
-}
-void Assembler::sub(Register dst, Register a, Register b)
-{
-  subf(dst, b, a);
-}
-void Assembler::subi(Register dst, Register a, int b)
-{
-  addi(dst, a, -b);
-}
-
-// Standard mnemonics for 64-bit implementations only
-#ifdef PPC64
-void Assembler::cmpd(ConditionRegister dst, Register a, Register b)
-{
-  cmp(dst, true, a, b);
-}
-void Assembler::cmpdi(ConditionRegister dst, Register a, int b)
-{
-  cmpi(dst, true, a, b);
-}
-void Assembler::sldi(Register dst, Register a, int b)
-{
-  rldicr(dst, a, b, 63 - b);
-}
-void Assembler::srdi(Register dst, Register a, int b)
-{
-  rldicl(dst, a, 64 - b, b);
-}
-#endif // PPC64
-
-// Wrappers for branch instructions
-
-void Assembler::b(Label &l)
-{
-  if (l.is_bound()) {
-    b(target(l));
-  }
-  else {
-    l.add_patch_at(code(), locator());
-    b(pc());
-  }
-}
-void Assembler::bc(int bo, int bi, Label& l)
-{
-  if (l.is_bound()) {
-    bc(bo, bi, target(l));
-  }
-  else {
-    l.add_patch_at(code(), locator());
-    bc(bo, bi, pc());
-  }
-}
-void Assembler::bl(Label &l)
-{
-  if (l.is_bound()) {
-    bl(target(l));
-  }
-  else {
-    l.add_patch_at(code(), locator());
-    bl(pc());
-  }
-}
-
-// Function to fix up forward branches
-
-void Assembler::pd_patch_instruction(address branch, address target)
-{
-  unsigned int instruction = *(unsigned int *) branch;
-  unsigned int opcode = instruction >> 26;
-  assert (!(instruction & 2), "must use relocations for absolute branches");
-
-  switch (opcode) {
-  case 16:
-    // conditional branch, 14-bit displacement
-    assert(!(instruction & 0xfffc), "should be zeroed");
-    (*(unsigned int *) branch) |= branch_target(branch, target, 14) << 2;
-    break;
-
-  case 18:
-    // unconditional branch, 24-bit displacement
-    assert(!(instruction & 0x3fffffc), "should be zeroed");
-    (*(unsigned int *) branch) |= branch_target(branch, target, 24) << 2;
-    break;
-
-  default:
-    Unimplemented();
-  }
-}
-
-#ifndef PRODUCT
-void Assembler::pd_print_patched_instruction(address branch)
-{
-  Unimplemented();
-}
-#endif // PRODUCT
-
-// 32-bit ABI:
-//
-//     | ...                  |
-//     +----------------------+
-//     | LR save word         |
-// +-> | Back chain           |
-// |   +----------------------+  ---------------------------------------
-// |   | FPR save area    f31 |                           high addresses
-// |   |                  ... |  2 * _fprs words
-// |   |                  f14 |
-// |   +----------------------+
-// |   | GPR save area    r31 |
-// |   |                  ... |  _gprs words
-// |   |                  r14 |
-// |   +----------------------+
-// |   | CR save area         |  1 word
-// |   +----------------------+
-// |   | Local variable space |  _locals words (+ padding if required)
-// |   +----------------------+
-// |   | Parameter list space |  _params words
-// |   +----------------------+
-// |   | LR save word         |  1 word
-// +---+ Back chain           |  1 word                    low addresses
-//     +----------------------+  ---------------------------------------
-
-// 64-bit ABI:
-//
-//     | ...                  |
-//     | LR save word         |
-//     | CR save word         |
-// +-> | Back chain           |
-// |   +----------------------+  ---------------------------------------
-// |   | FPR save area    f31 |                           high addresses
-// |   |                  ... |  _fprs words
-// |   |                  f14 |
-// |   +----------------------+
-// |   | GPR save area    r31 |
-// |   |                  ... |  _gprs words
-// |   |                  r14 |
-// |   +----------------------+
-// |   | Local variable space |  _locals words (+ padding if required)
-// |   +----------------------+
-// |   | Parameter list space |  _params words (minimum 8)
-// |   +----------------------+
-// |   | TOC save word        |  1 word
-// |   | Reserved             |  2 words
-// |   | LR save word         |  1 word
-// |   | CR save word         |  1 word
-// +---+ Back chain           |  1 word                    low addresses
-//     +----------------------+  ---------------------------------------
-
-const Address StackFrame::get_parameter()
-{
-  assert(_state == done_nothing, "can't change layout after prolog written");
-  assert(_locals == 0, "get all parameters before allocating locals");
-  return Address(r1, (link_area_words + _params++) * wordSize);
-}
-const Address StackFrame::get_local_variable()
-{
-  assert(_state == done_nothing, "can't change layout after prolog written");
-  if (_params < min_params)
-    _params = min_params;
-  return Address(r1, (link_area_words + _params + _locals++) * wordSize);
-}
-const ConditionRegister StackFrame::get_cr_field()
-{
-  assert(_state == done_nothing, "can't change layout after prolog written");
-  assert(_crfs < max_crfs, "no more fields!");
-  return as_ConditionRegister(4 - _crfs++);
-}
-const Register StackFrame::get_register()
-{
-  assert(_state == done_nothing, "can't change layout after prolog written");
-  assert(_gprs < max_gprs, "no more registers!");
-  return as_Register(31 - _gprs++);
-}
-const FloatRegister StackFrame::get_float_register()
-{
-  assert(_state == done_nothing, "can't change layout after prolog written");
-  assert(_fprs < max_fprs, "no more registers!");
-  return as_FloatRegister(31 - _fprs++);
-}
-void StackFrame::set_save_volatiles(bool value)
-{
-  assert(_state == done_nothing, "can't change layout after prolog written");
-  _save_volatiles = value;
-}
-
-int StackFrame::unaligned_size()
-{
-#ifdef PPC32
-  int crfs = _crfs ? 1 : 0;
-#else
-  int crfs = 0;
-#endif // PPC32
-
-  int params = _params;
-  if (params < min_params)
-    params = min_params;
-
-  int vgprs = _save_volatiles ? num_vgprs : 0;
-  int vsprs = _save_volatiles ? num_vsprs : 0;
-  int vfprs = _save_volatiles ? num_vfprs * words_per_fpr : 0;
-
-  return (link_area_words +
-          params +
-          _locals +
-          vgprs +
-          vsprs +
-          vfprs +
-          crfs +
-          _gprs +
-          _fprs * words_per_fpr) * wordSize;
-}
-
-int StackFrame::start_of_locals()
-{
-  int params = _params;
-  if (params < min_params)
-    params = min_params;
-
-  return (link_area_words + params) * wordSize;
-}
-
-#define __ masm->
-void StackFrame::generate_prolog(MacroAssembler *masm)
-{
-  assert(_state == done_nothing, "invalid state");
-
-  // Calculate the aligned frame size
-  while (true) {
-    _frame_size = unaligned_size();
-    if (_frame_size % StackAlignmentInBytes == 0)
-      break;
-    _locals++;
-  }
-  int offset  = start_of_locals() / wordSize + _locals;
-  const Address r0_save = Address(r1, offset++ * wordSize);
-
-  // Save the link register and create the new frame
-  if (_save_volatiles) {
-    __ store_update (r1, Address(r1, -_frame_size));
-    __ store (r0, r0_save);
-    __ mflr (r0);
-    __ store (r0, Address(r1, _frame_size + lr_save_offset * wordSize));
-  }
-  else {
-    __ mflr (r0);
-    __ store (r0, Address(r1, lr_save_offset * wordSize));
-    __ store_update (r1, Address(r1, -_frame_size));
-  }
-
-  // Store the remaining volatile registers
-  if (_save_volatiles) {
-    for (int i = 3; i < 13; i++) {
-      __ store (as_Register(i), Address(r1, offset++ * wordSize));
-    }
-    __ mfctr (r0);
-    __ store (r0, Address(r1, offset++ * wordSize));
-    for (int i = 0; i < num_vfprs; i++) {
-      __ stfd (as_FloatRegister(i), Address(r1, offset * wordSize));
-      offset += words_per_fpr;
-    }
-  }
-
-  // Store the non-volatile registers
-  if (_crfs) {
-    __ mfcr (r0);
-#ifdef PPC32
-    __ store (r0, Address(r1, offset++ * wordSize));
-#else
-    __ store (r0, Address(r1, cr_save_offset * wordSize));
-#endif // PPC32
-  }
-  for (int i = 32 - _gprs; i < 32; i++) {
-    __ store (as_Register(i), Address(r1, offset++ * wordSize));
-  }
-  for (int i = 32 - _fprs; i < 32; i++) {
-    __ stfd (as_FloatRegister(i), Address(r1, offset * wordSize));
-    offset += words_per_fpr;
-  }
-
-  // Restore r0 before continuing
-  if (_save_volatiles)
-    __ load (r0, r0_save);
-
-  _state = done_prolog;
-}
-void StackFrame::generate_epilog(MacroAssembler *masm)
-{
-  assert(_state != done_nothing, "invalid state");
-
-  int offset = start_of_locals() / wordSize + _locals;
-  const Address r0_save = Address(r1, offset++ * wordSize);
-
-  // Restore the volatile registers except r0
-  if (_save_volatiles) {
-    for (int i = 3; i < 13; i++) {
-      __ load (as_Register(i), Address(r1, offset++ * wordSize));
-    }
-    __ load (r0, Address(r1, offset++ * wordSize));
-    __ mtctr (r0);
-    for (int i = 0; i < num_vfprs; i++) {
-      __ lfd (as_FloatRegister(i), Address(r1, offset * wordSize));
-      offset += words_per_fpr;
-    }
-  }
-
-  // Restore the non-volatile registers
-  if (_crfs) {
-#ifdef PPC32
-    __ load (r0, Address(r1, offset++ * wordSize));
-#else
-    __ load (r0, Address(r1, cr_save_offset * wordSize));
-#endif // PPC32
-    __ mtcr (r0);
-  }
-  for (int i = 32 - _gprs; i < 32; i++) {
-    __ load (as_Register(i), Address(r1, offset++ * wordSize));
-  }
-  for (int i = 32 - _fprs; i < 32; i++) {
-    __ lfd (as_FloatRegister(i), Address(r1, offset * wordSize));
-    offset += words_per_fpr;
-  }
-
-  // Remove the frame and restore the link register
-  if (_save_volatiles) {
-    __ load (r0, Address(r1, _frame_size + lr_save_offset * wordSize));
-    __ mtlr (r0);
-    __ load (r0, r0_save);
-    __ addi (r1, r1, _frame_size);
-  }
-  else {
-    __ addi (r1, r1, _frame_size);
-    __ load (r0, Address(r1, lr_save_offset * wordSize));
-    __ mtlr (r0);
-  }
-
-  _state = done_epilog;
-}
-#undef __
-
-void MacroAssembler::align(int modulus)
-{
-  assert(!((offset() % modulus) & 3), "invalid alignment");
-  while (offset() % modulus != 0)
-    nop();
-}
-
-// Non-standard mnemonics
-void MacroAssembler::lbax(Register dst, Register a, Register b)
-{
-  lbzx(dst, a, b);
-  extsb(dst, dst);
-}
-void MacroAssembler::lhax(Register dst, Register a, Register b)
-{
-  // NB there actually is an actual lhax instruction but the
-  // manual mentions higher latency and gcc for one does not
-  // use it.
-  lhzx(dst, a, b);
-  extsh(dst, dst);
-}
-void MacroAssembler::lwa(Register dst, const Address& src)
-{
-  lwz(dst, src);
-#ifdef PPC64
-  extsw(dst, dst);
-#endif
-}
-void MacroAssembler::lwax(Register dst, Register a, Register b)
-{
-  lwzx(dst, a, b);
-#ifdef PPC64
-  extsw(dst, dst);
-#endif
-}
-void MacroAssembler::mpclr()
-{
-  // move pc to lr
-  // 20, 31 is a magic branch that preserves the link stack
-  bcl(20, 31, pc() + 4);
-}
-
-// Operations which are different on PPC32/64
-
-void MacroAssembler::call(address func)
-{
-  assert(((intptr_t) func & 3) == 0, "invalid address");
-
-#ifdef PPC32
-  const Register reg = r0;
-#else
-  const Register reg = r12;
-#endif // PPC32
-
-  load(reg, (intptr_t) func);
-  call(reg);
-}
-
-void MacroAssembler::call(Register func)
-{
-#ifdef PPC64
-  std(r2, Address(r1, 40));
-  ld(r2, Address(func, 8));
-  ld(r0, Address(func, 0));
-  func = r0;
-#endif // PPC64
-
-  mtctr(func);
-  bctrl();
-
-#ifdef PPC64
-  ld (r2, Address(r1, 40));
-#endif // PPC64
-}
-
-void MacroAssembler::compare(Register a, int b)
-{
-  compare(cr0, a, b);
-}
-
-void MacroAssembler::compare(Register a, Register b)
-{
-  compare(cr0, a, b);
-}
-
-void MacroAssembler::compare(ConditionRegister dst, Register a, int b)
-{
-#ifdef PPC32
-  cmpwi(dst, a, b);
-#else
-  cmpdi(dst, a, b);
-#endif // PPC32
-}
-
-void MacroAssembler::compare(ConditionRegister dst, Register a, Register b)
-{
-#ifdef PPC32
-  cmpw(dst, a, b);
-#else
-  cmpd(dst, a, b);
-#endif // PPC32
-}
-
-address MacroAssembler::enter()
-{
-  address start = pc();
-#ifdef PPC64
-  // Sneak in a function descriptor
-  // NB this is not relocatable!
-  emit_address(start + 16);
-  emit_address(NULL);
-#endif // PPC64
-  return start;
-}
-
-void MacroAssembler::load(Register dst, long value)
-{
-#ifdef PPC32
-  int a = value >> 16;
-  int b = value & 0xffff;
-
-  if (a) {
-    lis(dst, a);
-    if (b)
-      ori(dst, dst, b);
-  }
-  else {
-    li(dst, b);
-  }
-#else
-  int a = (int)(value >> 48);
-  int b = (int)(value >> 32) & 0xffff;
-  int c = (int)(value >> 16) & 0xffff;
-  int d = (int) value & 0xffff;
-
-  if (a) {
-    lis (dst, a);
-    if (b)
-      ori (dst, dst, b);
-  }
-  else if (b) {
-    li (dst, b);
-  }
-  if (a || b)
-    sldi (dst, dst, 32);
-
-  if (c) {
-    if (a || b)
-      oris (dst, dst, c);
-    else
-      lis (dst, c);
-    if (d)
-      ori (dst, dst, d);
-  }
-  else if (d || !(a || b)) {
-    if (a || b)
-      ori (dst, dst, d);
-    else
-      li (dst, d);
-  }
-#endif // PPC32
-}
-
-void MacroAssembler::load(Register dst, const Address& src)
-{
-#ifdef PPC32
-  lwz(dst, src);
-#else
-  ld(dst, src);
-#endif // PPC32
-}
-
-void MacroAssembler::load_and_reserve_indexed(Register dst, Register a,
-                                              Register b) {
-#ifdef PPC32
-  lwarx(dst, a, b);
-#else
-  ldarx(dst, a, b);
-#endif // PPC32
-}
-
-void MacroAssembler::load_indexed(Register dst, Register a, Register b)
-{
-#ifdef PPC32
-  lwzx(dst, a, b);
-#else
-  ldx(dst, a, b);
-#endif // PPC32
-}
-
-void MacroAssembler::shift_left(Register dst, Register a, int b)
-{
-#ifdef PPC32
-  slwi(dst, a, b);
-#else
-  sldi(dst, a, b);
-#endif // PPC32
-}
-
-void MacroAssembler::shift_right(Register dst, Register a, int b)
-{
-#ifdef PPC32
-  srwi(dst, a, b);
-#else
-  srdi(dst, a, b);
-#endif // PPC32
-}
-
-void MacroAssembler::store(Register src, const Address& dst)
-{
-#ifdef PPC32
-  stw(src, dst);
-#else
-  std(src, dst);
-#endif // PPC32
-}
-
-void MacroAssembler::store_conditional_indexed(Register src, Register a,
-                                               Register b) {
-#ifdef PPC32
-  stwcx_(src, a, b);
-#else
-  stdcx_(src, a, b);
-#endif // PPC32
-}
-
-void MacroAssembler::store_indexed(Register src, Register a, Register b)
-{
-#ifdef PPC32
-  stwx(src, a, b);
-#else
-  stdx(src, a, b);
-#endif // PPC32
-}
-
-void MacroAssembler::store_update(Register src, const Address& dst)
-{
-#ifdef PPC32
-  stwu(src, dst);
-#else
-  stdu(src, dst);
-#endif // PPC32
-}
-
-void MacroAssembler::store_update_indexed(Register src, Register a, Register b)
-{
-#ifdef PPC32
-  stwux(src, a, b);
-#else
-  stdux(src, a, b);
-#endif // PPC32
-}
-
-// Atomic compare and exchange
-//
-// if (*dst == comp)
-//   *dst = exchange
-//
-// Returns:
-//   cr0 is set to reflect whether the store was performed
-
-void MacroAssembler::cmpxchg_(Register exchange, Register dst, Register comp)
-{
-  assert_different_registers(exchange, dst, comp, r0);
-
-  Label loop, done;
-
-  sync();
-  bind(loop);
-  load_and_reserve_indexed(r0, 0, dst);
-  compare(r0, comp);
-  bne(done);
-  store_conditional_indexed(exchange, 0, dst);
-  bne(loop);
-  isync();
-  bind(done);
-}
-
-void MacroAssembler::call_VM_pass_args(Register arg_1,
-                                       Register arg_2,
-                                       Register arg_3)
-{
-  if (arg_1 != r4) {
-    assert(arg_2 != r4, "smashed argument");
-    assert(arg_3 != r4, "smashed argument");
-    mr(r4, arg_1);
-  }
-
-  if (arg_2 == noreg) {
-    assert (arg_3 == noreg, "what?");
-    return;
-  }
-
-  if (arg_2 != r5) {
-    assert(arg_3 != r5, "smashed argument");
-    mr(r5, arg_2);
-  }
-
-  if (arg_3 != noreg && arg_3 != r6) {
-    mr(r6, arg_3);
-  }
-}
-
-void MacroAssembler::call_VM_base(Register oop_result,
-                                  address entry_point,
-                                  CallVMFlags flags)
-{
-  StackFrame frame;
-
-  if (flags & CALL_VM_PRESERVE_LR)
-    prolog(frame);
-
-  mr(r3, Rthread);
-  call(entry_point);
-
-  if (flags & CALL_VM_PRESERVE_LR)
-    epilog(frame);
-
-  if (!(flags & CALL_VM_NO_EXCEPTION_CHECKS)) {
-    Label ok;
-    load(r0, Address(Rthread, Thread::pending_exception_offset()));
-    compare (r0, 0);
-    beq(ok);
-    unimplemented(__FILE__, __LINE__);
-    bind(ok);
-  }
-
-  if (oop_result->is_valid()) {
-    unimplemented(__FILE__, __LINE__);
-  }
-}
-
-void MacroAssembler::call_VM(Register oop_result,
-                             address entry_point,
-                             CallVMFlags flags)
-{
-  call_VM_base(oop_result, entry_point, flags);
-}
-void MacroAssembler::call_VM(Register oop_result,
-                             address entry_point,
-                             Register arg_1,
-                             CallVMFlags flags)
-{
-  call_VM_pass_args(arg_1);
-  call_VM_base(oop_result, entry_point, flags);
-}
-void MacroAssembler::call_VM(Register oop_result,
-                             address entry_point,
-                             Register arg_1, Register arg_2,
-                             CallVMFlags flags)
-{
-  call_VM_pass_args(arg_1, arg_2);
-  call_VM_base(oop_result, entry_point, flags);
-}
-void MacroAssembler::call_VM(Register oop_result,
-                             address entry_point,
-                             Register arg_1, Register arg_2, Register arg_3,
-                             CallVMFlags flags)
-{
-  call_VM_pass_args(arg_1, arg_2, arg_3);
-  call_VM_base(oop_result, entry_point, flags);
-}
-
-void MacroAssembler::call_VM_leaf_base(address entry_point)
-{
-  mr(r3, Rthread);
-  call(entry_point);
-}
-
-void MacroAssembler::call_VM_leaf(address entry_point)
-{
-  call_VM_leaf_base(entry_point);
-}
-void MacroAssembler::call_VM_leaf(address entry_point, Register arg_1)
-{
-  call_VM_pass_args(arg_1);
-  call_VM_leaf_base(entry_point);
-}
-void MacroAssembler::call_VM_leaf(address entry_point, Register arg_1,
-                                  Register arg_2)
-{
-  call_VM_pass_args(arg_1, arg_2);
-  call_VM_leaf_base(entry_point);
-}
-void MacroAssembler::call_VM_leaf(address entry_point, Register arg_1,
-                                  Register arg_2, Register arg_3)
-{
-  call_VM_pass_args(arg_1, arg_2, arg_3);
-  call_VM_leaf_base(entry_point);
-}
-
-// Write serialization page so VM thread can do a pseudo remote membar.
-void MacroAssembler::serialize_memory(Register tmp1, Register tmp2)
-{
-  // We use the current thread pointer to calculate a thread specific
-  // offset to write to within the page. This minimizes bus traffic
-  // due to cache line collision.
-  shift_right(tmp1, Rthread, os::get_serialize_page_shift_count());
-  andi_(tmp1, tmp1, os::vm_page_size() - sizeof(int));
-  load(tmp2, (intptr_t) os::get_memory_serialize_page());
-  stwx(tmp1, tmp2, tmp1);
-}
-
-void MacroAssembler::null_check(Register reg, int offset) {
-  if (needs_explicit_null_check((intptr_t) offset)) {
-    // provoke OS NULL exception if reg = NULL by
-    // accessing M[reg] w/o changing any registers
-    Unimplemented();
-  }
-  else {
-    // nothing to do, (later) access of M[reg + offset]
-    // will provoke OS NULL exception if reg = NULL
-  }
-}
-
-void MacroAssembler::verify_oop(Register reg, const char* s)
-{
-  if (!VerifyOops)
-    return;
-
-  Unimplemented();
-}
-
-void MacroAssembler::calc_padding_for_alignment(
-  Register dst, Register src, int align) {
-#ifdef ASSERT
-  {
-    int tmp = align;
-    while (!(tmp & 1))
-      tmp >>= 1;
-    assert (tmp == 1, "alignment must be a power of two");
-  }
-#endif // ASSERT
-  andi_(dst, src, align - 1);
-  subfic(dst, dst, align);
-  andi_(dst, dst, align - 1);
-}
-
-void MacroAssembler::maybe_extend_frame(
-  Register required_bytes, Register available_bytes)
-{
-  Label done;
-
-  // Check whether we have enough space already
-  compare(required_bytes, available_bytes);
-  ble(done);
-
-  // Calculate how many extra bytes we need to allocate
-  const Register extra_bytes = required_bytes;
-  const Register padding     = available_bytes;
-
-  sub(extra_bytes, required_bytes, available_bytes);
-  calc_padding_for_alignment(padding, extra_bytes, StackAlignmentInBytes);
-  add(extra_bytes, extra_bytes, padding);
-
-  // Extend the frame
-  const Register saved_r1 = padding;
-  const Register scratch  = extra_bytes;
-
-  mr(saved_r1, r1);
-  neg(scratch, extra_bytes);
-  store_update_indexed(r1, r1, scratch);
-  load(scratch, Address(saved_r1, StackFrame::back_chain_offset * wordSize));
-  store(scratch, Address(r1, StackFrame::back_chain_offset * wordSize));
-#ifdef PPC64
-  load(scratch, Address(saved_r1, StackFrame::cr_save_offset * wordSize));
-  store(scratch, Address(r1, StackFrame::cr_save_offset * wordSize));
-#endif
-
-  bind (done);
-}
-
-void MacroAssembler::get_mirror_handle(Register dst)
-{
-  load(dst, Address(Rmethod, methodOopDesc::constants_offset()));
-  load(dst, Address(dst, constantPoolOopDesc::pool_holder_offset_in_bytes()));
-  load(dst, Address(dst, klassOopDesc::klass_part_offset_in_bytes()
-                         + Klass::java_mirror_offset_in_bytes()));
-}
-
-void MacroAssembler::report_and_die(address function,
-                                    const char* file, int line,
-                                    const char* message) {
-  load(r3, (intptr_t) file);
-  load(r4, line);
-  if (message)
-    load(r5, (intptr_t) message);
-  call(function);
-}
-
-void MacroAssembler::should_not_reach_here(const char* file, int line)
-{
-  report_and_die(
-    CAST_FROM_FN_PTR(address, report_should_not_reach_here), file, line);
-}
-void MacroAssembler::unimplemented(const char* file, int line)
-{
-  report_and_die(
-    CAST_FROM_FN_PTR(address, report_unimplemented), file, line);
-}
-void MacroAssembler::untested(const char* file, int line, const char* message)
-{
-  report_and_die(
-    CAST_FROM_FN_PTR(address, report_untested), file, line, message);
-}
-
-address MacroAssembler::generate_unimplemented_stub(const char* file, int line)
-{
-  address start = enter();
-  StackFrame frame;
-  prolog(frame);
-  unimplemented(file, line);
-  epilog(frame);
-  blr();
-  return start;
-}
-address MacroAssembler::generate_unimplemented_entry(const char* file,int line)
-{
-  address start = pc();
-  StackFrame frame;
-  prolog(frame);
-  unimplemented(file, line);
-  epilog(frame);
-  blr();
-  return start;
-}
-
-#ifndef PRODUCT
-static void dump_int_helper(const char* prefix, long src)
-{
-  ttyLocker ttyl;
-  ResourceMark rm;
-
-  if (abs(src) < 1000000)
-#ifdef PPC64
-    tty->print_cr("%s = %ld", prefix, src);
-#else
-    tty->print_cr("%s = %d", prefix, src);
-#endif // PPC64
-  else
-    tty->print_cr("%s = %p", prefix, src);
-}
-
-void MacroAssembler::dump_int(Register src)
-{
-  dump_int(src->name(), src);
-}
-
-void MacroAssembler::dump_int(const char* prefix, Register src)
-{
-  StackFrame frame;
-  frame.set_save_volatiles(true);
-  prolog(frame);
-  if (src == r1) {
-    int framesize = frame.unaligned_size();
-    framesize += (StackAlignmentInBytes -
-                  (framesize & (StackAlignmentInBytes - 1))) &
-                 (StackAlignmentInBytes - 1);
-    addi(r4, r1, framesize);
-  }
-  else if (src != r4) {
-    mr(r4, src);
-  }
-  load(r3, (intptr_t) prefix);
-  call(CAST_FROM_FN_PTR(address, dump_int_helper));
-  epilog(frame);
-}
-#endif // PRODUCT
-
-void MacroAssembler::bang_stack_with_offset(int offset)
-{
-  Unimplemented();
-}

--- a/ports/hotspot/src/cpu/ppc/vm/assembler_ppc.hpp	Wed Mar 05 08:04:00 2008 -0500
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,467 +0,0 @@
-/*
- * Copyright 1997-2007 Sun Microsystems, Inc.  All Rights Reserved.
- * Copyright 2007 Red Hat, Inc.
- * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
- *
- * This code is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 only, as
- * published by the Free Software Foundation.
- *
- * This code is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
- * version 2 for more details (a copy is included in the LICENSE file that
- * accompanied this code).
- *
- * You should have received a copy of the GNU General Public License version
- * 2 along with this work; if not, write to the Free Software Foundation,
- * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
- * CA 95054 USA or visit www.sun.com if you need additional information or
- * have any questions.
- *
- */
-
-// The definitions needed for ppc assembly code generation.
-
-// Non-volatile registers used by the interpreter
-
-REGISTER_DECLARATION(Register, Rthread, r31);
-REGISTER_DECLARATION(Register, Rmethod, r30);
-REGISTER_DECLARATION(Register, Rlocals, r29);
-
-
-// Address is an abstraction used to represent a memory location
-
-class Address {
- private:
-  const Register _base;
-  const int16_t  _displacement;
-
- public:
-  Address(const Register base, int16_t displacement)
-    : _base(base),
-      _displacement(displacement)
-  {
-    assert(base != r0, "can't use r0 for addressing");
-  }
-
-#ifdef ASSERT
-  Address(Register base, ByteSize displacement)
-    : _base(base),
-      _displacement(in_bytes(displacement)) {}
-#endif // ASSERT
-
-  const Register base() const { return _base; }
-  int displacement() const { return (int) _displacement & 0xffff; }
-};
-
-
-// The ppc Assembler: Pure assembler doing NO optimizations on
-// the instruction level; i.e., what you write is what you get.
-// The Assembler is generating code into a CodeBuffer.
-
-class Assembler : public AbstractAssembler {
- public:
-  Assembler(CodeBuffer* code) : AbstractAssembler(code) {}
-
- private:
-  static bool is_simm(int x, int nbits)
-  {
-    return -(1 << nbits - 1) <= x && x < (1 << nbits - 1);
-  }
-
- public:
-  static bool is_simm16(int x)
-  {
-    return is_simm(x, 16);
-  }
-
- private:
-  // Instruction emitters for the various forms.
-  // Every instruction should ultimately come through one of these.
-  void emit_instruction(int opcode, int li, bool aa, bool lk);
-  void emit_instruction(int opcode, int bo, int bi, int bd, bool aa, bool lk);
-  void emit_instruction(int opcode, int a, int b, int c);
-  void emit_instruction(int opcode, int a, int b, int c, int d);
-  void emit_instruction(int opcode, int a, int b, int c, int xo, bool rc);
-  void emit_instruction(int opcode, int a, int b, int c, int d, int e,bool rc);
-
-  // Wrappers for the instruction emitters.
-  // These handle casting and stuff.
-  void emit_instruction(int opcode, Register a, Register b, int c);
-  void emit_instruction(int opcode, Register a, Register b, int c, int d);
-  void emit_instruction(int opcode, FloatRegister a, Register b, int c);
-  void emit_instruction(int opcode, Register a, const Address& b);
-  void emit_instruction(int opcode, Register a, const Address& b, int c);
-  void emit_instruction(int opcode, FloatRegister a, const Address& b);
-  void emit_instruction(int opcode, Register a, int b, int c, int xo,
-                        bool rc);
-  void emit_instruction(int opcode, Register a,  Register b, Register c,
-                        int xo, bool rc);
-  void emit_instruction(int opcode, Register a, SpecialPurposeRegister b,
-                        int c, int xo, bool rc);
-  void emit_instruction(int opcode, SpecialPurposeRegister a, Register b,
-                        int c, int xo, bool rc);
-  void emit_instruction(int opcode, Register a, Register b, int c, int d,
-                        int e, bool rc);
-  void emit_instruction(int opcode, int a, Register b, Register c, int d,
-                        bool rc);
-  void emit_instruction(int opcode, ConditionRegister a, bool l,
-                        Register b, Register c, int d, bool rc);
-  void emit_instruction(int opcode, ConditionRegister a, bool l,
-                        Register b, int c);
-  void emit_instruction(int opcode, FloatRegister a, int b,
-                        FloatRegister c, int xo, bool rc);
-
-  // Helper for computing branch targets
-  intptr_t branch_target(address branch, address target, int bits);
-
- public:
-  // Instructions common to 32- and 64-bit implementations
-  void add(Register dst, Register a, Register b);
-  void addi(Register dst, Register a, int b);
-  void addis(Register dst, Register a, int b);
-  void andi_(Register dst, Register a, int b);
-  void b(address a);
-  void bc(int bo, int bi, address a);
-  void bcctrl(int bo, int bi);
-  void bcl(int bo, int bi, address a);
-  void bclr(int bo, int bi);
-  void bclrl(int bo, int bi);
-  void bl(address a);
-  void cmp(ConditionRegister dst, bool l, Register a, Register b);
-  void cmpi(ConditionRegister dst, bool l, Register a, int b);
-  void dcbf(Register a, Register b);
-  void extsb(Register dst, Register src);
-  void extsh(Register dst, Register src);
-  void fmr(FloatRegister dst, FloatRegister src);
-  void icbi(Register a, Register b);
-  void isync();
-  void lbzx(Register dst, Register a, Register b);
-  void lfd(FloatRegister dst, const Address& src);
-  void lfs(FloatRegister dst, const Address& src);
-  void lhz(Register dst, const Address& src);
-  void lhzx(Register dst, Register a, Register b);
-  void lwarx(Register dst, Register a, Register b);
-  void lwz(Register dst, const Address& src);
-  void lwzx(Register dst, Register a, Register b);
-  void mfcr(Register dst);
-  void mfspr(Register dst, SpecialPurposeRegister src);
-  void mtcrf(int mask, Register src);
-  void mtspr(SpecialPurposeRegister dst, Register src);
-  void neg(Register dst, Register src);
-  void OR(Register dst, Register a, Register b);
-  void ori(Register dst, Register a, int b);
-  void oris(Register dst, Register a, int b);
-  void rlwinm(Register dst, Register a, int b, int mb, int me);
-  void stfd(FloatRegister src, const Address& dst);
-  void stfs(FloatRegister src, const Address& dst);
-  void stw(Register src, const Address& dst);
-  void stwcx_(Register src, Register a, Register b);
-  void stwu(Register src, const Address& dst);
-  void stwux(Register src, Register a, Register b);
-  void stwx(Register src, Register a, Register b);
-  void subf(Register dst, Register a, Register b);
-  void subfic(Register dst, Register a, int b);
-  void sync();
-
-  // Instructions for 64-bit implementations only
-#ifdef PPC64
-  void extsw(Register dst, Register src);
-  void ld(Register dst, const Address& src);
-  void ldarx(Register dst, Register a, Register b);
-  void ldx(Register dst, Register a, Register b);
-  void std(Register src, const Address& dst);
-  void stdcx_(Register src, Register a, Register b);
-  void stdu(Register src, const Address& dst);
-  void stdux(Register src, Register a, Register b);
-  void stdx(Register src, Register a, Register b);
-  void rldicl(Register dst, Register a, int sh, int mb);
-  void rldicr(Register dst, Register a, int sh, int me);
-#endif // PPC64
-
-  // Standard mnemonics common to 32- and 64-bit implementations
-  void bctrl();
-  void bdnz(Label& l);
-  void beq(Label& l);
-  void beqlr();
-  void bge(Label& l);
-  void bgt(Label& l);
-  void ble(Label& l);
-  void blelr();
-  void blr();
-  void blrl();
-  void blt(Label& l);
-  void bne(Label& l);
-  void bne(ConditionRegister r, Label& l);
-  void cmpw(ConditionRegister dst, Register a, Register b);
-  void cmpwi(ConditionRegister dst, Register a, int b);
-  void la(Register dst, Address value);
-  void li(Register dst, int value);
-  void lis(Register dst, int value);
-  void mr(Register dst, Register src);
-  void mfctr(Register dst);
-  void mflr(Register dst);
-  void mtcr(Register src);
-  void mtctr(Register src);
-  void mtlr(Register src);
-  void nop();
-  void slwi(Register dst, Register a, int b);
-  void srwi(Register dst, Register a, int b);
-  void sub(Register dst, Register a, Register b);
-  void subi(Register dst, Register a, int b);
-
-  // Standard mnemonics for 64-bit implementations only
-#ifdef PPC64
-  void cmpd(ConditionRegister dst, Register a, Register b);
-  void cmpdi(ConditionRegister dst, Register a, int b);
-  void sldi(Register dst, Register a, int b);
-  void srdi(Register dst, Register a, int b);
-#endif // PPC64
-
-  // Wrappers for branch instructions
-  void b(Label& l);
-  void bc(int bo, int bi, Label& l);
-  void bl(Label& l);
-
-  // Function to fix up forward branches
-  void pd_patch_instruction(address branch, address target);
-#ifndef PRODUCT
-  static void pd_print_patched_instruction(address branch);
-#endif // PRODUCT
-};
-
-
-// StackFrame is used to generate prologs and epilogs
-
-class StackFrame {
- private:
-  int _params;
-  int _locals;
-  int _crfs;
-  int _gprs;
-  int _fprs;
-
-  enum State {
-    done_nothing,
-    done_prolog,
-    done_epilog
-  };
-  State _state;
-
-  int _frame_size;
-
-  bool _save_volatiles;
-
- public:
-  enum LinkArea {
-    back_chain_offset,
-#ifdef PPC64
-    cr_save_offset,
-#endif // PPC64
-    lr_save_offset,
-#ifdef PPC64
-    reserved_1,
-    reserved_2,
-    saved_toc_offset,
-#endif // PPC64
-    link_area_words
-  };
-
-  enum Constants {
-#ifdef PPC32
-    min_params = 0,
-#else
-    min_params = 8,
-#endif // PPC32
-    max_gprs  = 18, // r14-r31
-    max_fprs  = 18, // f14-f31
-    max_crfs  = 3,  // cr2-cr4
-    num_vgprs = 11, // r0 and r3-r12
-    num_vsprs = 1,  // ctr
-    num_vfprs = 14, // f0-f13
-
-    words_per_fpr = 8 / wordSize
-  };
-
- public:
-  StackFrame()
-    : _params(0),
-      _locals(0),
-      _crfs(0),
-      _gprs(0),
-      _fprs(0),
-      _state(done_nothing),
-      _save_volatiles(false) {}
-
-#ifdef ASSERT
-  ~StackFrame() { assert(_state != done_prolog, "stack not restored"); }
-#endif // ASSERT
-
-  const Address get_parameter();
-  const Address get_local_variable();
-  const ConditionRegister get_cr_field();
-  const Register get_register();
-  const FloatRegister get_float_register();
-
- protected:
-  void generate_prolog(MacroAssembler *masm);
-  void generate_epilog(MacroAssembler *masm);
-
-  void set_save_volatiles(bool value);
-
-  friend class MacroAssembler;
-
- public:
-  int unaligned_size();
-  int start_of_locals();
-};
-
-
-// Flags for MacroAssembler::call_VM
-
-enum CallVMFlags {
-  CALL_VM_DEFAULTS            = 0,
-  CALL_VM_NO_EXCEPTION_CHECKS = 1,
-  CALL_VM_PRESERVE_LR         = 2
-};
-
-
-// MacroAssembler extends Assembler by frequently used macros.
-//
-// Instructions for which a 'better' code sequence exists depending
-// on arguments should also go in here.
-
-class MacroAssembler : public Assembler {
- protected:
-  // Support for VM calls
-  //
-  // This is the base routine called by the different versions of
-  // call_VM_leaf. The interpreter may customize this version by
-  // overriding it for its purposes (e.g., to save/restore additional
-  // registers when doing a VM call).
-  virtual void call_VM_leaf_base(address entry_point);
-
-  // This is the base routine called by the different versions of
-  // call_VM. The interpreter may customize this version by overriding
-  // it for its purposes (e.g., to save/restore additional registers
-  // when doing a VM call).
-  virtual void call_VM_base(Register oop_result,
-                            address entry_point,
-                            CallVMFlags flags);
-
- private:
-  void call_VM_pass_args(Register arg_1,
-                         Register arg_2 = noreg,
-                         Register arg_3 = noreg);
-
- public:
-  MacroAssembler(CodeBuffer* code) : Assembler(code) {}
-
-  void align(int modulus);
-
-  void prolog(StackFrame& frame) { frame.generate_prolog(this); }
-  void epilog(StackFrame& frame) { frame.generate_epilog(this); }
-
-  // Non-standard mnemonics
-  void lbax(Register dst, Register a, Register b);
-  void lhax(Register dst, Register a, Register b);
-  void lwa(Register dst, const Address& src);
-  void lwax(Register dst, Register a, Register b);
-  void mpclr();
-
-  // Operations which are different on PPC32/64
-  void call(address addr);
-  void call(Register addr);
-  void compare(Register a, int b);
-  void compare(Register a, Register b);
-  void compare(ConditionRegister dst, Register a, int b);
-  void compare(ConditionRegister dst, Register a, Register b);
-  address enter();
-  void load(Register dst, long value);
-  void load(Register dst, const Address& src);
-  void load_and_reserve_indexed(Register dst, Register a, Register b);
-  void load_indexed(Register dst, Register a, Register b);
-  void shift_left(Register dst, Register a, int b);
-  void shift_right(Register dst, Register a, int b);
-  void store(Register src, const Address& dst);
-  void store_conditional_indexed(Register dst, Register a, Register b);
-  void store_indexed(Register src, Register a, Register b);
-  void store_update(Register src, const Address& dst);
-  void store_update_indexed(Register src, Register a, Register b);
-
-  void cmpxchg_(Register exchange, Register dst, Register compare);
-
-  // Support for VM calls
-  void call_VM(Register oop_result,
-               address entry_point,
-               CallVMFlags flags = CALL_VM_DEFAULTS);
-  void call_VM(Register oop_result,
-               address entry_point,
-               Register arg_1,
-               CallVMFlags flags = CALL_VM_DEFAULTS);
-  void call_VM(Register oop_result,
-               address entry_point,
-               Register arg_1, Register arg_2,
-               CallVMFlags flags = CALL_VM_DEFAULTS);
-  void call_VM(Register oop_result,
-               address entry_point,
-               Register arg_1, Register arg_2, Register arg_3,
-               CallVMFlags flags = CALL_VM_DEFAULTS);
-
-  void call_VM_leaf(address entry_point);
-  void call_VM_leaf(address entry_point,
-                    Register arg_1);
-  void call_VM_leaf(address entry_point,
-                    Register arg_1, Register arg_2);
-  void call_VM_leaf(address entry_point,
-                    Register arg_1, Register arg_2, Register arg_3);
-
-  // Support for serializing memory accesses between threads
-  void serialize_memory(Register tmp1, Register tmp2);
-
-  // Support for NULL-checks
-  void null_check(Register reg, int offset = -1);
-  static bool needs_explicit_null_check(intptr_t offset);
-
-  // Support for VerifyOops
-  void verify_oop(Register reg, const char* s = "broken oop");
-
-  void calc_padding_for_alignment(Register dst, Register src, int align);
-  void maybe_extend_frame(Register required_bytes, Register available_bytes);
-  void get_mirror_handle(Register dst);
-
- private:
-  void report_and_die(address function,
-                      const char* file, int line,
-                      const char* message = NULL);
-
- public:
-  void should_not_reach_here(const char* file, int line);
-  void unimplemented(const char* file, int line);
-  void untested(const char* file, int line, const char* message);
-
-  address generate_unimplemented_stub(const char* file, int line);
-  address generate_unimplemented_entry(const char* file, int line);
-
-#ifndef PRODUCT
-  void dump_int(Register src);
-  void dump_int(const char* prefix, Register src);
-#endif // PRODUCT
-
-  void bang_stack_with_offset(int offset);
-};
-
-#ifdef ASSERT
-inline bool AbstractAssembler::pd_check_instruction_mark()
-{
-  Unimplemented();
-}
-#endif
-
-#define UnimplementedStub() \
-  (__ generate_unimplemented_stub(__FILE__, __LINE__))
-#define UnimplementedEntry() \
-  (__ generate_unimplemented_entry(__FILE__, __LINE__))

--- a/ports/hotspot/src/cpu/ppc/vm/bytecodeInterpreter_ppc.hpp	Wed Mar 05 08:04:00 2008 -0500
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,98 +0,0 @@
-/*
- * Copyright 2002 Sun Microsystems, Inc.  All Rights Reserved.
- * Copyright 2007 Red Hat, Inc.
- * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
- *
- * This code is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 only, as
- * published by the Free Software Foundation.
- *
- * This code is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
- * version 2 for more details (a copy is included in the LICENSE file that
- * accompanied this code).
- *
- * You should have received a copy of the GNU General Public License version
- * 2 along with this work; if not, write to the Free Software Foundation,
- * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
- * CA 95054 USA or visit www.sun.com if you need additional information or
- * have any questions.
- *
- */
-
-// Platform specific for C++ based Interpreter
-#define LOTS_OF_REGS   // Use plenty of registers
-
- private:
-  interpreterState _self_link;
-
- public:
-  static ByteSize stack_limit_offset()
-  {
-    return byte_offset_of(BytecodeInterpreter, _stack_limit);
-  }
-
-// The frame manager handles this
-#define SET_LAST_JAVA_FRAME()
-#define RESET_LAST_JAVA_FRAME()
-
-/*
- * Macros for accessing the stack.
- */
-#undef STACK_INT
-#undef STACK_FLOAT
-#undef STACK_ADDR
-#undef STACK_OBJECT
-#undef STACK_DOUBLE
-#undef STACK_LONG
-
-// JavaStack Implementation
-
-#define GET_STACK_SLOT(offset)    (*((intptr_t*) &topOfStack[-(offset)]))
-#define STACK_SLOT(offset)    ((address) &topOfStack[-(offset)])
-#define STACK_ADDR(offset)    (*((address *) &topOfStack[-(offset)]))
-#define STACK_INT(offset)     (*((jint*) &topOfStack[-(offset)]))
-#define STACK_FLOAT(offset)   (*((jfloat *) &topOfStack[-(offset)]))
-#define STACK_OBJECT(offset)  (*((oop *) &topOfStack [-(offset)]))
-#define STACK_DOUBLE(offset)  (((VMJavaVal64*) &topOfStack[-(offset)])->d)
-#define STACK_LONG(offset)    (((VMJavaVal64 *) &topOfStack[-(offset)])->l)
-
-#define SET_STACK_SLOT(value, offset)   (*(intptr_t*)&topOfStack[-(offset)] = *(intptr_t*)(value))
-#define SET_STACK_ADDR(value, offset)   (*((address *)&topOfStack[-(offset)]) = (value))
-#define SET_STACK_INT(value, offset)    (*((jint *)&topOfStack[-(offset)]) = (value))
-#define SET_STACK_FLOAT(value, offset)  (*((jfloat *)&topOfStack[-(offset)]) = (value))
-#define SET_STACK_OBJECT(value, offset) (*((oop *)&topOfStack[-(offset)]) = (value))
-#define SET_STACK_DOUBLE(value, offset) (((VMJavaVal64*)&topOfStack[-(offset)])->d = (value))
-#define SET_STACK_DOUBLE_FROM_ADDR(addr, offset) (((VMJavaVal64*)&topOfStack[-(offset)])->d =  \
-                                                 ((VMJavaVal64*)(addr))->d)
-#define SET_STACK_LONG(value, offset)   (((VMJavaVal64*)&topOfStack[-(offset)])->l = (value))
-#define SET_STACK_LONG_FROM_ADDR(addr, offset)   (((VMJavaVal64*)&topOfStack[-(offset)])->l =  \
-                                                 ((VMJavaVal64*)(addr))->l)
-// JavaLocals implementation
-
-#define LOCALS_SLOT(offset)    ((intptr_t*)&locals[-(offset)])
-#define LOCALS_ADDR(offset)    ((address)locals[-(offset)])
-#define LOCALS_INT(offset)     (*((jint*)&locals[-(offset)]))
-#define LOCALS_FLOAT(offset)   (*((jfloat*)&locals[-(offset)]))
-#define LOCALS_OBJECT(offset)  ((oop)locals[-(offset)])
-#define LOCALS_DOUBLE(offset)  (((VMJavaVal64*)&locals[-((offset) + 1)])->d)
-#define LOCALS_LONG(offset)    (((VMJavaVal64*)&locals[-((offset) + 1)])->l)
-#define LOCALS_LONG_AT(offset) (((address)&locals[-((offset) + 1)]))
-#define LOCALS_DOUBLE_AT(offset) (((address)&locals[-((offset) + 1)]))
-
-#define SET_LOCALS_SLOT(value, offset)    (*(intptr_t*)&locals[-(offset)] = *(intptr_t *)(value))
-#define SET_LOCALS_ADDR(value, offset)    (*((address *)&locals[-(offset)]) = (value))
-#define SET_LOCALS_INT(value, offset)     (*((jint *)&locals[-(offset)]) = (value))
-#define SET_LOCALS_FLOAT(value, offset)   (*((jfloat *)&locals[-(offset)]) = (value))
-#define SET_LOCALS_OBJECT(value, offset)  (*((oop *)&locals[-(offset)]) = (value))
-#define SET_LOCALS_DOUBLE(value, offset)  (((VMJavaVal64*)&locals[-((offset)+1)])->d = (value))
-#define SET_LOCALS_LONG(value, offset)    (((VMJavaVal64*)&locals[-((offset)+1)])->l = (value))
-#define SET_LOCALS_DOUBLE_FROM_ADDR(addr, offset) (((VMJavaVal64*)&locals[-((offset)+1)])->d = \
-                                                  ((VMJavaVal64*)(addr))->d)
-#define SET_LOCALS_LONG_FROM_ADDR(addr, offset) (((VMJavaVal64*)&locals[-((offset)+1)])->l = \
-                                                ((VMJavaVal64*)(addr))->l)
-
-

--- a/ports/hotspot/src/cpu/ppc/vm/bytecodeInterpreter_ppc.inline.hpp	Wed Mar 05 08:04:00 2008 -0500
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,278 +0,0 @@
-/*
- * Copyright 2002 Sun Microsystems, Inc.  All Rights Reserved.
- * Copyright 2007 Red Hat, Inc.
- * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
- *
- * This code is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 only, as
- * published by the Free Software Foundation.
- *
- * This code is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
- * version 2 for more details (a copy is included in the LICENSE file that
- * accompanied this code).
- *
- * You should have received a copy of the GNU General Public License version
- * 2 along with this work; if not, write to the Free Software Foundation,
- * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
- * CA 95054 USA or visit www.sun.com if you need additional information or
- * have any questions.
- *
- */
-
-// Inline interpreter functions for ppc
-
-inline jfloat BytecodeInterpreter::VMfloatAdd(jfloat op1, jfloat op2) { return op1 + op2; }
-inline jfloat BytecodeInterpreter::VMfloatSub(jfloat op1, jfloat op2) { return op1 - op2; }
-inline jfloat BytecodeInterpreter::VMfloatMul(jfloat op1, jfloat op2) { return op1 * op2; }
-inline jfloat BytecodeInterpreter::VMfloatDiv(jfloat op1, jfloat op2) { return op1 / op2; }
-inline jfloat BytecodeInterpreter::VMfloatRem(jfloat op1, jfloat op2) { return fmod(op1, op2); }
-
-inline jfloat BytecodeInterpreter::VMfloatNeg(jfloat op) { return -op; }
-
-inline int32_t BytecodeInterpreter::VMfloatCompare(jfloat op1, jfloat op2, int32_t direction) {
-  return ( op1 < op2 ? -1 :
-               op1 > op2 ? 1 :
-                   op1 == op2 ? 0 :
-                       (direction == -1 || direction == 1) ? direction : 0);
-
-}
-
-inline void BytecodeInterpreter::VMmemCopy64(uint32_t to[2], const uint32_t from[2]) {
-  *(uint64_t *) to = *(uint64_t *) from;
-}
-
-inline jlong BytecodeInterpreter::VMlongAdd(jlong op1, jlong op2) {
-  return op1 + op2;
-}
-
-inline jlong BytecodeInterpreter::VMlongAnd(jlong op1, jlong op2) {
-  return op1 & op2;
-}
-
-inline jlong BytecodeInterpreter::VMlongDiv(jlong op1, jlong op2) {
-  // QQQ what about check and throw...
-  return op1 / op2;
-}
-
-inline jlong BytecodeInterpreter::VMlongMul(jlong op1, jlong op2) {
-  return op1 * op2;
-}
-
-inline jlong BytecodeInterpreter::VMlongOr(jlong op1, jlong op2) {
-  return op1 | op2;
-}
-
-inline jlong BytecodeInterpreter::VMlongSub(jlong op1, jlong op2) {
-  return op1 - op2;
-}
-
-inline jlong BytecodeInterpreter::VMlongXor(jlong op1, jlong op2) {
-  return op1 ^ op2;
-}
-
-inline jlong BytecodeInterpreter::VMlongRem(jlong op1, jlong op2) {
-  return op1 % op2;
-}
-
-inline jlong BytecodeInterpreter::VMlongUshr(jlong op1, jint op2) {
-  // CVM did this 0x3f mask, is the really needed??? QQQ
-  return ((unsigned long long) op1) >> (op2 & 0x3F);
-}
-
-inline jlong BytecodeInterpreter::VMlongShr(jlong op1, jint op2) {
-  return op1 >> (op2 & 0x3F);
-}
-
-inline jlong BytecodeInterpreter::VMlongShl(jlong op1, jint op2) {
-  return op1 << (op2 & 0x3F);
-}
-
-inline jlong BytecodeInterpreter::VMlongNeg(jlong op) {
-  return -op;
-}
-
-inline jlong BytecodeInterpreter::VMlongNot(jlong op) {
-  return ~op;
-}
-
-inline int32_t BytecodeInterpreter::VMlongLtz(jlong op) {
-  return (op <= 0);
-}
-
-inline int32_t BytecodeInterpreter::VMlongGez(jlong op) {
-  return (op >= 0);
-}
-
-inline int32_t BytecodeInterpreter::VMlongEqz(jlong op) {
-  return (op == 0);
-}
-
-inline int32_t BytecodeInterpreter::VMlongEq(jlong op1, jlong op2) {
-  return (op1 == op2);
-}
-
-inline int32_t BytecodeInterpreter::VMlongNe(jlong op1, jlong op2) {
-  return (op1 != op2);
-}
-
-inline int32_t BytecodeInterpreter::VMlongGe(jlong op1, jlong op2) {
-  return (op1 >= op2);
-}
-
-inline int32_t BytecodeInterpreter::VMlongLe(jlong op1, jlong op2) {
-  return (op1 <= op2);
-}
-
-inline int32_t BytecodeInterpreter::VMlongLt(jlong op1, jlong op2) {
-  return (op1 < op2);
-}
-
-inline int32_t BytecodeInterpreter::VMlongGt(jlong op1, jlong op2) {
-  return (op1 > op2);
-}
-
-inline int32_t BytecodeInterpreter::VMlongCompare(jlong op1, jlong op2) {
-  return (VMlongLt(op1, op2) ? -1 : VMlongGt(op1, op2) ? 1 : 0);
-}
-
-// Long conversions
-
-inline jdouble BytecodeInterpreter::VMlong2Double(jlong val) {
-  return (jdouble) val;
-}
-
-inline jfloat BytecodeInterpreter::VMlong2Float(jlong val) {
-  return (jfloat) val;
-}
-
-inline jint BytecodeInterpreter::VMlong2Int(jlong val) {
-  return (jint) val;
-}
-
-// Double Arithmetic
-
-inline jdouble BytecodeInterpreter::VMdoubleAdd(jdouble op1, jdouble op2) {
-  return op1 + op2;
-}
-
-inline jdouble BytecodeInterpreter::VMdoubleDiv(jdouble op1, jdouble op2) {
-  // Divide by zero... QQQ
-  return op1 / op2;
-}
-
-inline jdouble BytecodeInterpreter::VMdoubleMul(jdouble op1, jdouble op2) {
-  return op1 * op2;
-}
-
-inline jdouble BytecodeInterpreter::VMdoubleNeg(jdouble op) {
-  return -op;
-}
-
-inline jdouble BytecodeInterpreter::VMdoubleRem(jdouble op1, jdouble op2) {
-  return fmod(op1, op2);
-}
-
-inline jdouble BytecodeInterpreter::VMdoubleSub(jdouble op1, jdouble op2) {
-  return op1 - op2;
-}
-
-inline int32_t BytecodeInterpreter::VMdoubleCompare(jdouble op1, jdouble op2, int32_t direction) {
-  return ( op1 < op2 ? -1 :
-               op1 > op2 ? 1 :
-                   op1 == op2 ? 0 :
-                       (direction == -1 || direction == 1) ? direction : 0);
-}
-
-// Double Conversions
-
-inline jfloat BytecodeInterpreter::VMdouble2Float(jdouble val) {
-  return (jfloat) val;
-}
-
-// Float Conversions
-
-inline jdouble BytecodeInterpreter::VMfloat2Double(jfloat op) {
-  return (jdouble) op;
-}
-
-// Integer Arithmetic
-
-inline jint BytecodeInterpreter::VMintAdd(jint op1, jint op2) {
-  return op1 + op2;
-}
-
-inline jint BytecodeInterpreter::VMintAnd(jint op1, jint op2) {
-  return op1 & op2;
-}
-
-inline jint BytecodeInterpreter::VMintDiv(jint op1, jint op2) {
-  /* it's possible we could catch this special case implicitly */
-  if (op1 == (jint) 0x80000000 && op2 == -1) return op1;
-  else return op1 / op2;
-}
-
-inline jint BytecodeInterpreter::VMintMul(jint op1, jint op2) {
-  return op1 * op2;
-}
-
-inline jint BytecodeInterpreter::VMintNeg(jint op) {
-  return -op;
-}
-
-inline jint BytecodeInterpreter::VMintOr(jint op1, jint op2) {
-  return op1 | op2;
-}
-
-inline jint BytecodeInterpreter::VMintRem(jint op1, jint op2) {
-  /* it's possible we could catch this special case implicitly */
-  if (op1 == (jint) 0x80000000 && op2 == -1) return 0;
-  else return op1 % op2;
-}
-
-inline jint BytecodeInterpreter::VMintShl(jint op1, jint op2) {
-  return op1 <<  op2;
-}
-
-inline jint BytecodeInterpreter::VMintShr(jint op1, jint op2) {
-  return op1 >>  op2; // QQ op2 & 0x1f??
-}
-
-inline jint BytecodeInterpreter::VMintSub(jint op1, jint op2) {
-  return op1 - op2;
-}
-
-inline jint BytecodeInterpreter::VMintUshr(jint op1, jint op2) {
-  return ((juint) op1) >> op2; // QQ op2 & 0x1f??
-}
-
-inline jint BytecodeInterpreter::VMintXor(jint op1, jint op2) {
-  return op1 ^ op2;
-}
-
-inline jdouble BytecodeInterpreter::VMint2Double(jint val) {
-  return (jdouble) val;
-}
-
-inline jfloat BytecodeInterpreter::VMint2Float(jint val) {
-  return (jfloat) val;
-}
-
-inline jlong BytecodeInterpreter::VMint2Long(jint val) {
-  return (jlong) val;
-}
-
-inline jchar BytecodeInterpreter::VMint2Char(jint val) {
-  return (jchar) val;
-}
-
-inline jshort BytecodeInterpreter::VMint2Short(jint val) {
-  return (jshort) val;
-}
-
-inline jbyte BytecodeInterpreter::VMint2Byte(jint val) {
-  return (jbyte) val;
-}

--- a/ports/hotspot/src/cpu/ppc/vm/bytecodes_ppc.cpp	Wed Mar 05 08:04:00 2008 -0500
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,32 +0,0 @@
-/*
- * Copyright 2003 Sun Microsystems, Inc.  All Rights Reserved.
- * Copyright 2007 Red Hat, Inc.
- * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
- *
- * This code is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 only, as
- * published by the Free Software Foundation.
- *
- * This code is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
- * version 2 for more details (a copy is included in the LICENSE file that
- * accompanied this code).
- *
- * You should have received a copy of the GNU General Public License version
- * 2 along with this work; if not, write to the Free Software Foundation,
- * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
- * CA 95054 USA or visit www.sun.com if you need additional information or
- * have any questions.
- *
- */
-
-#include "incls/_precompiled.incl"
-#include "incls/_bytecodes_ppc.cpp.incl"
-
-void Bytecodes::pd_initialize()
-{
-  // No ppc specific initialization
-}

--- a/ports/hotspot/src/cpu/ppc/vm/bytecodes_ppc.hpp	Wed Mar 05 08:04:00 2008 -0500
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,25 +0,0 @@
-/*
- * Copyright 2003 Sun Microsystems, Inc.  All Rights Reserved.
- * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
- *
- * This code is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 only, as
- * published by the Free Software Foundation.
- *
- * This code is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
- * version 2 for more details (a copy is included in the LICENSE file that
- * accompanied this code).
- *
- * You should have received a copy of the GNU General Public License version
- * 2 along with this work; if not, write to the Free Software Foundation,
- * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
- * CA 95054 USA or visit www.sun.com if you need additional information or
- * have any questions.
- *
- */
-
-// No ppc specific bytecodes

--- a/ports/hotspot/src/cpu/ppc/vm/bytes_ppc.hpp	Wed Mar 05 08:04:00 2008 -0500
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,210 +0,0 @@
-/*
- * Copyright 1997-2002 Sun Microsystems, Inc.  All Rights Reserved.
- * Copyright 2007 Red Hat, Inc.
- * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
- *
- * This code is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 only, as
- * published by the Free Software Foundation.
- *
- * This code is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
- * version 2 for more details (a copy is included in the LICENSE file that
- * accompanied this code).
- *
- * You should have received a copy of the GNU General Public License version
- * 2 along with this work; if not, write to the Free Software Foundation,
- * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
- * CA 95054 USA or visit www.sun.com if you need additional information or
- * have any questions.
- *
- */
-
-class Bytes: AllStatic {
- public:
-  // Returns true if the byte ordering used by Java is different
-  // from the native byte ordering of the underlying machine.
-  static inline bool is_Java_byte_ordering_different()
-  {
-#ifdef VM_LITTLE_ENDIAN
-    return true;
-#else
-    return false;
-#endif
-  }
-
-  // Efficient reading and writing of unaligned unsigned data in
-  // platform-specific byte ordering.
-  static inline u2   get_native_u2(address p){
-    return (intptr_t(p) & 1) == 0
-             ?   *(u2*)p
-             :   ( u2(p[0]) << 8 )
-               | ( u2(p[1])      );
-  }
-
-  static inline u4   get_native_u4(address p) {
-    switch (intptr_t(p) & 3) {
-     case 0:  return *(u4*)p;
-
-     case 2:  return (  u4( ((u2*)p)[0] ) << 16  )
-                   | (  u4( ((u2*)p)[1] )                  );
-
-    default:  return ( u4(p[0]) << 24 )
-                   | ( u4(p[1]) << 16 )
-                   | ( u4(p[2]) <<  8 )
-                   |   u4(p[3]);
-    }
-  }
-
-  static inline u8   get_native_u8(address p) {
-    switch (intptr_t(p) & 7) {
-      case 0:  return *(u8*)p;
-
-      case 4:  return (  u8( ((u4*)p)[0] ) << 32  )
-                    | (  u8( ((u4*)p)[1] )        );
-
-      case 2:  return (  u8( ((u2*)p)[0] ) << 48  )
-                    | (  u8( ((u2*)p)[1] ) << 32  )
-                    | (  u8( ((u2*)p)[2] ) << 16  )
-                    | (  u8( ((u2*)p)[3] )        );
-
-     default:  return ( u8(p[0]) << 56 )
-                    | ( u8(p[1]) << 48 )
-                    | ( u8(p[2]) << 40 )
-                    | ( u8(p[3]) << 32 )
-                    | ( u8(p[4]) << 24 )
-                    | ( u8(p[5]) << 16 )
-                    | ( u8(p[6]) <<  8 )
-                    |   u8(p[7]);
-    }
-  }
-
-  static inline void put_native_u2(address p, u2 x)   {
-    if ( (intptr_t(p) & 1) == 0 )  *(u2*)p = x;
-    else {
-      p[0] = x >> 8;
-      p[1] = x;
-    }
-  }
-
-  static inline void put_native_u4(address p, u4 x) {
-    switch ( intptr_t(p) & 3 ) {
-    case 0:  *(u4*)p = x;
-              break;
-
-    case 2:  ((u2*)p)[0] = x >> 16;
-             ((u2*)p)[1] = x;
-             break;
-
-    default: ((u1*)p)[0] = x >> 24;
-             ((u1*)p)[1] = x >> 16;
-             ((u1*)p)[2] = x >>  8;
-             ((u1*)p)[3] = x;
-             break;
-    }
-  }
-
-  static inline void put_native_u8(address p, u8 x) {
-    switch ( intptr_t(p) & 7 ) {
-    case 0:  *(u8*)p = x;
-             break;
-
-    case 4:  ((u4*)p)[0] = x >> 32;
-             ((u4*)p)[1] = x;
-             break;
-
-    case 2:  ((u2*)p)[0] = x >> 48;
-             ((u2*)p)[1] = x >> 32;
-             ((u2*)p)[2] = x >> 16;
-             ((u2*)p)[3] = x;
-             break;
-
-    default: ((u1*)p)[0] = x >> 56;
-             ((u1*)p)[1] = x >> 48;
-             ((u1*)p)[2] = x >> 40;
-             ((u1*)p)[3] = x >> 32;
-             ((u1*)p)[4] = x >> 24;
-             ((u1*)p)[5] = x >> 16;
-             ((u1*)p)[6] = x >>  8;
-             ((u1*)p)[7] = x;
-    }
-  }
-
-
-  // Efficient reading and writing of unaligned unsigned data in Java
-  // byte ordering (i.e. big-endian ordering).
-#ifdef VM_LITTLE_ENDIAN
-  // Byte-order reversal is needed
-  static inline u2 get_Java_u2(address p)
-  {
-    return swap_u2(get_native_u2(p));
-  }
-  static inline u4 get_Java_u4(address p)
-  {
-    return swap_u4(get_native_u4(p));
-  }
-  static inline u8 get_Java_u8(address p)
-  {
-    return swap_u8(get_native_u8(p));
-  }
-
-  static inline void put_Java_u2(address p, u2 x)
-  {
-    put_native_u2(p, swap_u2(x));
-  }
-  static inline void put_Java_u4(address p, u4 x)
-  {
-    put_native_u4(p, swap_u4(x));
-  }
-  static inline void put_Java_u8(address p, u8 x)
-  {
-    put_native_u8(p, swap_u8(x));
-  }
-
-  // Efficient swapping of byte ordering
-  static inline u2 swap_u2(u2 x);
-  static inline u4 swap_u4(u4 x);
-  static inline u8 swap_u8(u8 x);
-#else
-  // No byte-order reversal is needed
-  static inline u2 get_Java_u2(address p)
-  {
-    return get_native_u2(p);
-  }
-  static inline u4 get_Java_u4(address p)
-  {
-    return get_native_u4(p);
-  }
-  static inline u8 get_Java_u8(address p)
-  {
-    return get_native_u8(p);
-  }
-
-  static inline void put_Java_u2(address p, u2 x)
-  {
-    put_native_u2(p, x);
-  }
-  static inline void put_Java_u4(address p, u4 x)
-  {
-    put_native_u4(p, x);
-  }
-  static inline void put_Java_u8(address p, u8 x)
-  {
-    put_native_u8(p, x);
-  }
-
-  // No byte-order reversal is needed
-  static inline u2 swap_u2(u2 x) { return x; }
-  static inline u4 swap_u4(u4 x) { return x; }
-  static inline u8 swap_u8(u8 x) { return x; }
-#endif // VM_LITTLE_ENDIAN
-};
-
-#ifdef VM_LITTLE_ENDIAN
-// The following header contains the implementations of swap_u2,
-// swap_u4, and swap_u8
-#include "incls/_bytes_pd.inline.hpp.incl"
-#endif // VM_LITTLE_ENDIAN

--- a/ports/hotspot/src/cpu/ppc/vm/c1_CodeStubs_ppc.cpp	Wed Mar 05 08:04:00 2008 -0500
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,109 +0,0 @@
-/*
- * Copyright 1999-2006 Sun Microsystems, Inc.  All Rights Reserved.
- * Copyright 2007 Red Hat, Inc.
- * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
- *
- * This code is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 only, as
- * published by the Free Software Foundation.
- *
- * This code is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
- * version 2 for more details (a copy is included in the LICENSE file that
- * accompanied this code).
- *
- * You should have received a copy of the GNU General Public License version
- * 2 along with this work; if not, write to the Free Software Foundation,
- * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
- * CA 95054 USA or visit www.sun.com if you need additional information or
- * have any questions.
- *
- */
-
-#include "incls/_precompiled.incl"
-#include "incls/_c1_CodeStubs_ppc.cpp.incl"
-
-#define __ ce->masm()->
-
-RangeCheckStub::RangeCheckStub(CodeEmitInfo* info, LIR_Opr index,
-                               bool throw_index_out_of_bounds_exception)
-  : _throw_index_out_of_bounds_exception(throw_index_out_of_bounds_exception),
-    _index(index)
-{
-  _info = new CodeEmitInfo(info);
-}
-
-void RangeCheckStub::emit_code(LIR_Assembler* ce)
-{
-  Unimplemented();
-}
-
-void DivByZeroStub::emit_code(LIR_Assembler* ce)
-{
-  Unimplemented();
-}
-
-NewInstanceStub::NewInstanceStub(LIR_Opr klass_reg, LIR_Opr result,
-                                 ciInstanceKlass* klass, CodeEmitInfo* info,
-                                 Runtime1::StubID stub_id)
-{
-  _result = result;
-  _klass = klass;
-  _klass_reg = klass_reg;
-  _info = new CodeEmitInfo(info);
-  assert(stub_id == Runtime1::new_instance_id ||
-         stub_id == Runtime1::fast_new_instance_id ||
-         stub_id == Runtime1::fast_new_instance_init_check_id,
-         "need new_instance id");
-  _stub_id = stub_id;
-}
-
-void NewInstanceStub::emit_code(LIR_Assembler* ce)
-{
-  __ unimplemented (__FILE__, __LINE__);
-}
-
-MonitorEnterStub::MonitorEnterStub(LIR_Opr obj_reg, LIR_Opr lock_reg,
-                                   CodeEmitInfo* info)
-  : MonitorAccessStub(obj_reg, lock_reg)
-{
-  Unimplemented();
-}
-
-void MonitorEnterStub::emit_code(LIR_Assembler* ce)
-{
-  Unimplemented();
-}
-
-void MonitorExitStub::emit_code(LIR_Assembler* ce)
-{
-  Unimplemented();
-}
-
-#ifdef XXX_EVIL_EVIL_EVIL
-int PatchingStub::_patch_info_offset = 0;
-#endif
-
-void ImplicitNullCheckStub::emit_code(LIR_Assembler* ce)
-{
-  Unimplemented();
-}
-
-ArrayStoreExceptionStub::ArrayStoreExceptionStub(CodeEmitInfo* info)
-  : _info(info)
-{
-  Unimplemented();
-}
-
-void ArrayStoreExceptionStub::emit_code(LIR_Assembler* ce)
-{
-  Unimplemented();
-}
-
-void ArrayCopyStub::emit_code(LIR_Assembler* ce)
-{
-  Unimplemented();
-}

--- a/ports/hotspot/src/cpu/ppc/vm/c1_Defs_ppc.hpp	Wed Mar 05 08:04:00 2008 -0500
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,72 +0,0 @@
-/*
- * Copyright 2000-2005 Sun Microsystems, Inc.  All Rights Reserved.
- * Copyright 2007 Red Hat, Inc.
- * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
- *
- * This code is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 only, as
- * published by the Free Software Foundation.
- *
- * This code is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
- * version 2 for more details (a copy is included in the LICENSE file that
- * accompanied this code).
- *
- * You should have received a copy of the GNU General Public License version
- * 2 along with this work; if not, write to the Free Software Foundation,
- * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
- * CA 95054 USA or visit www.sun.com if you need additional information or
- * have any questions.
- *
- */
-
-// native word offsets from memory address (big endian)
-enum {
-  pd_lo_word_offset_in_bytes = BytesPerWord,
-  pd_hi_word_offset_in_bytes = 0
-};
-
-// are explicit rounding operations required to implement the strictFP mode?
-enum {
-#ifdef XXX_EVIL_EVIL_EVIL
-  pd_strict_fp_requires_explicit_rounding = false
-#endif
-};
-
-// registers
-enum {
-#ifdef XXX_EVIL_EVIL_EVIL
-  // numbers of registers used during code emission
-  pd_nof_cpu_regs_frame_map = 32,
-  pd_nof_fpu_regs_frame_map = 32,
-
-  // numbers of registers killed by calls
-  pd_nof_caller_save_cpu_regs_frame_map = 11,
-  pd_nof_caller_save_fpu_regs_frame_map = 14,
-
-  // numbers of registers visible to register allocator
-  pd_nof_cpu_regs_reg_alloc = 0,
-  pd_nof_fpu_regs_reg_alloc = 0,
-
-  // numbers of registers visible to linear scan
-  pd_nof_cpu_regs_linearscan = 32,
-  pd_nof_fpu_regs_linearscan = 32,
-  pd_nof_xmm_regs_linearscan = 0,
-
-  // specifics
-  pd_first_cpu_reg = 3,  // skip r0, r1 and r2
-  pd_last_cpu_reg  = 30, // skip Rthread
-  pd_first_fpu_reg = 0,
-  pd_last_fpu_reg  = 31,
-#endif
-};
-
-// encoding of float value in debug info
-enum {
-#ifdef XXX_EVIL_EVIL_EVIL
-  pd_float_saved_as_double = false
-#endif
-};

--- a/ports/hotspot/src/cpu/ppc/vm/c1_FrameMap_ppc.cpp	Wed Mar 05 08:04:00 2008 -0500
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,107 +0,0 @@
-/*
- * Copyright 1999-2006 Sun Microsystems, Inc.  All Rights Reserved.
- * Copyright 2007 Red Hat, Inc.
- * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
- *
- * This code is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 only, as
- * published by the Free Software Foundation.
- *
- * This code is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
- * version 2 for more details (a copy is included in the LICENSE file that
- * accompanied this code).
- *
- * You should have received a copy of the GNU General Public License version
- * 2 along with this work; if not, write to the Free Software Foundation,
- * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
- * CA 95054 USA or visit www.sun.com if you need additional information or
- * have any questions.
- *
- */
-
-#include "incls/_precompiled.incl"
-#include "incls/_c1_FrameMap_ppc.cpp.incl"
-
-LIR_Opr FrameMap::map_to_opr(BasicType type, VMRegPair* reg, bool)
-{
-  LIR_Opr opr = LIR_OprFact::illegalOpr;
-  VMReg r_1 = reg->first();
-  VMReg r_2 = reg->second();
-  if (r_1->is_stack()) {
-    Unimplemented();
-  }
-  else if (r_1->is_Register()) {
-    Register reg = r_1->as_Register();
-    if (r_2->is_Register()) {
-      Register reg2 = r_2->as_Register();
-      opr = as_long_opr(reg2, reg);
-    } else if (type == T_OBJECT) {
-      opr = as_oop_opr(reg);
-    } else {
-      opr = as_opr(reg);
-    }
-  }
-  else if (r_1->is_FloatRegister()) {
-    Unimplemented();
-  }
-  else {
-    ShouldNotReachHere();
-  }
-  return opr;
-}
-
-LIR_Opr FrameMap::gpr_opr[];
-LIR_Opr FrameMap::gpr_oop_opr[];
-LIR_Opr FrameMap::fpr_opr[];
-
-LIR_Opr FrameMap::_caller_save_cpu_regs[] = { 0, };
-LIR_Opr FrameMap::_caller_save_fpu_regs[] = { 0, };
-
-void FrameMap::init()
-{
-  if (_init_done)
-    return;
-
-  for (int i = 0; i < nof_cpu_regs; i++) {
-    map_register(i, as_Register(i));
-    gpr_opr[i] = LIR_OprFact::single_cpu(i);
-    gpr_oop_opr[i] = LIR_OprFact::single_cpu_oop(i);
-  }
-
-  for (int i = 0, j = 0; j < nof_caller_save_cpu_regs; i++) {
-    if (i != 1 && i != 2)
-      _caller_save_cpu_regs[j++] = LIR_OprFact::single_cpu(i);
-  }
-
-  for (int i = 0; i < nof_caller_save_fpu_regs; i++) {
-    _caller_save_fpu_regs[i] = LIR_OprFact::single_fpu(i);
-  }
-
-  _init_done = true;
-}
-
-bool FrameMap::validate_frame()
-{
-#ifdef XXX_EVIL_EVIL_EVIL
-  return true;
-#endif
-}
-
-VMReg FrameMap::fpu_regname(int n)
-{
-  Unimplemented();
-}
-
-LIR_Opr FrameMap::stack_pointer()
-{
-  Unimplemented();
-}
-
-bool FrameMap::is_caller_save_register(LIR_Opr reg)
-{
-  Unimplemented();
-}

--- a/ports/hotspot/src/cpu/ppc/vm/c1_FrameMap_ppc.hpp	Wed Mar 05 08:04:00 2008 -0500
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,44 +0,0 @@
-/*
- * Copyright 1999-2006 Sun Microsystems, Inc.  All Rights Reserved.
- * Copyright 2007 Red Hat, Inc.
- * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
- *
- * This code is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 only, as
- * published by the Free Software Foundation.
- *
- * This code is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
- * version 2 for more details (a copy is included in the LICENSE file that
- * accompanied this code).
- *
- * You should have received a copy of the GNU General Public License version
- * 2 along with this work; if not, write to the Free Software Foundation,
- * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
- * CA 95054 USA or visit www.sun.com if you need additional information or
- * have any questions.
- *
- */
-
- public:
-  enum {
-#ifdef XXX_EVIL_EVIL_EVIL
-    first_available_sp_in_frame = 0,
-    frame_pad_in_bytes = 0
-#endif
-  };
-
-  static LIR_Opr gpr_opr[nof_cpu_regs];
-  static LIR_Opr gpr_oop_opr[nof_cpu_regs];
-  static LIR_Opr fpr_opr[nof_fpu_regs];
-
-  static LIR_Opr as_long_opr(Register r, Register r2) {
-    return LIR_OprFact::double_cpu(cpu_reg2rnr(r), cpu_reg2rnr(r2));
-  }
-
-  static VMReg fpu_regname(int n);
-
-  static bool is_caller_save_register(LIR_Opr reg);

--- a/ports/hotspot/src/cpu/ppc/vm/c1_LIRAssembler_ppc.cpp	Wed Mar 05 08:04:00 2008 -0500
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,368 +0,0 @@
-/*
- * Copyright 2000-2007 Sun Microsystems, Inc.  All Rights Reserved.
- * Copyright 2007 Red Hat, Inc.
- * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
- *
- * This code is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 only, as
- * published by the Free Software Foundation.
- *
- * This code is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
- * version 2 for more details (a copy is included in the LICENSE file that
- * accompanied this code).
- *
- * You should have received a copy of the GNU General Public License version
- * 2 along with this work; if not, write to the Free Software Foundation,
- * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
- * CA 95054 USA or visit www.sun.com if you need additional information or
- * have any questions.
- *
- */
-
-#include "incls/_precompiled.incl"
-#include "incls/_c1_LIRAssembler_ppc.cpp.incl"
-
-#define __ _masm->
-
-LIR_Opr LIR_Assembler::receiverOpr()
-{
-#ifdef XXX_EVIL_EVIL_EVIL
-  return FrameMap::gpr_oop_opr[3];
-#endif
-}
-
-LIR_Opr LIR_Assembler::osrBufferPointer()
-{
-  Unimplemented();
-}
-
-int LIR_Assembler::initial_frame_size_in_bytes()
-{
-  return in_bytes(frame_map()->framesize_in_bytes());
-}
-
-int LIR_Assembler::check_icache()
-{
-  __ unimplemented (__FILE__, __LINE__);
-}
-
-void LIR_Assembler::osr_entry()
-{
-  Unimplemented();
-}
-
-void LIR_Assembler::emit_exception_handler()
-{
-  compilation()->offsets()->set_value(CodeOffsets::Exceptions, code_offset());
-  __ unimplemented (__FILE__, __LINE__);
-}
-
-void LIR_Assembler::emit_deopt_handler()
-{
-  compilation()->offsets()->set_value(CodeOffsets::Deopt, code_offset());
-  __ unimplemented (__FILE__, __LINE__);
-}
-
-void LIR_Assembler::emit_op3(LIR_Op3* op)
-{
-  Unimplemented();
-}
-
-void LIR_Assembler::emit_opBranch(LIR_OpBranch* op)
-{
-  Unimplemented();
-}
-
-void LIR_Assembler::emit_opConvert(LIR_OpConvert* op)
-{
-  Unimplemented();
-}
-
-void LIR_Assembler::align_call(LIR_Code code)
-{
-  // do nothing
-}
-
-void LIR_Assembler::call(address entry, relocInfo::relocType rtype,
-                         CodeEmitInfo* info) {
-  __ unimplemented (__FILE__, __LINE__);
-}
-
-void LIR_Assembler::ic_call(address entry, CodeEmitInfo* info)
-{
-  Unimplemented();
-}
-
-void LIR_Assembler::vtable_call(int vtable_offset, CodeEmitInfo* info)
-{
-  Unimplemented();
-}
-
-void LIR_Assembler::const2stack(LIR_Opr src, LIR_Opr dest)
-{
-  Unimplemented();
-}
-
-void LIR_Assembler::const2mem(LIR_Opr src, LIR_Opr dest,
-                              BasicType type, CodeEmitInfo* info) {
-  __ unimplemented (__FILE__, __LINE__);
-}
-
-void LIR_Assembler::const2reg(LIR_Opr src, LIR_Opr dest,
-                              LIR_PatchCode patch_code, CodeEmitInfo* info) {
-  __ unimplemented (__FILE__, __LINE__);
-}
-
-void LIR_Assembler::stack2stack(LIR_Opr src, LIR_Opr dest, BasicType type)
-{
-  Unimplemented();
-}
-
-void LIR_Assembler::mem2reg(LIR_Opr src, LIR_Opr dest, BasicType type,
-                            LIR_PatchCode patch_code,
-                            CodeEmitInfo* info, bool unaligned) {
-  Unimplemented();
-}
-
-void LIR_Assembler::prefetchr(LIR_Opr src)
-{
-  Unimplemented();
-}
-
-void LIR_Assembler::prefetchw(LIR_Opr src)
-{
-  Unimplemented();
-}
-
-void LIR_Assembler::stack2reg(LIR_Opr src, LIR_Opr dest, BasicType type)
-{
-  Unimplemented();
-}
-
-void LIR_Assembler::reg2stack(LIR_Opr src, LIR_Opr dest, BasicType type,
-                              bool pop_fpu_stack) {
-  Unimplemented();
-}
-
-void LIR_Assembler::reg2reg(LIR_Opr src, LIR_Opr dest)
-{
-  __ unimplemented (__FILE__, __LINE__);
-}
-
-void LIR_Assembler::reg2mem(LIR_Opr src, LIR_Opr dest, BasicType type,
-                            LIR_PatchCode patch_code, CodeEmitInfo* info,
-                            bool pop_fpu_stack, bool unaligned) {
-  __ unimplemented (__FILE__, __LINE__);
-}
-
-void LIR_Assembler::return_op(LIR_Opr result)
-{
-  __ unimplemented (__FILE__, __LINE__);
-}
-
-int LIR_Assembler::safepoint_poll(LIR_Opr tmp, CodeEmitInfo* info)
-{
-  Unimplemented();
-}
-
-void LIR_Assembler::emit_static_call_stub()
-{
-  __ unimplemented (__FILE__, __LINE__);
-}
-
-void LIR_Assembler::comp_op(LIR_Condition condition,
-                            LIR_Opr opr1, LIR_Opr opr2, LIR_Op2* op) {
-  Unimplemented();
-}
-
-void LIR_Assembler::comp_fl2i(LIR_Code code,
-                              LIR_Opr left, LIR_Opr right,
-                              LIR_Opr dst, LIR_Op2* op) {
-  Unimplemented();
-}
-
-void LIR_Assembler::cmove(LIR_Condition condition,
-                          LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result) {
-  Unimplemented();
-}
-
-void LIR_Assembler::arith_op(LIR_Code code,
-                             LIR_Opr left, LIR_Opr right, LIR_Opr dest,
-                             CodeEmitInfo* info, bool pop_fpu_stack) {
-  Unimplemented();
-}
-
-void LIR_Assembler::fpop()
-{
-  Unimplemented();
-}
-
-void LIR_Assembler::intrinsic_op(LIR_Code code, LIR_Opr value,
-                                 LIR_Opr unused, LIR_Opr dest, LIR_Op* op) {
-  Unimplemented();
-}
-
-void LIR_Assembler::logic_op(LIR_Code code,
-                             LIR_Opr left, LIR_Opr right, LIR_Opr dst) {
-  Unimplemented();
-}
-
-void LIR_Assembler::throw_op(LIR_Opr exceptionPC, LIR_Opr exceptionOop,
-                             CodeEmitInfo* info, bool unwind) {
-  Unimplemented();
-}
-
-void LIR_Assembler::emit_arraycopy(LIR_OpArrayCopy* op)
-{
-  Unimplemented();
-}
-
-void LIR_Assembler::shift_op(LIR_Code code, LIR_Opr left,
-                             LIR_Opr count, LIR_Opr dest, LIR_Opr tmp) {
-  Unimplemented();
-}
-
-void LIR_Assembler::shift_op(LIR_Code code, LIR_Opr left,
-                             jint count, LIR_Opr dest) {
-  __ unimplemented (__FILE__, __LINE__);
-}
-
-void LIR_Assembler::emit_alloc_obj(LIR_OpAllocObj* op)
-{
-  __ unimplemented (__FILE__, __LINE__);
-}
-
-void LIR_Assembler::emit_alloc_array(LIR_OpAllocArray* op)
-{
-  Unimplemented();
-}
-
-void LIR_Assembler::emit_opTypeCheck(LIR_OpTypeCheck* op)
-{
-  Unimplemented();
-}
-
-void LIR_Assembler::emit_compare_and_swap(LIR_OpCompareAndSwap* op)
-{
-  Unimplemented();
-}
-
-void LIR_Assembler::set_24bit_FPU()
-{
-  Unimplemented();
-}
-
-void LIR_Assembler::reset_FPU()
-{
-  Unimplemented();
-}
-
-void LIR_Assembler::breakpoint()
-{
-  Unimplemented();
-}
-
-void LIR_Assembler::push(LIR_Opr opr)
-{
-  Unimplemented();
-}
-
-void LIR_Assembler::pop(LIR_Opr opr)
-{
-  Unimplemented();
-}
-
-void LIR_Assembler::monitor_address(int monitor_no, LIR_Opr dst)
-{
-  Unimplemented();
-}
-
-void LIR_Assembler::emit_lock(LIR_OpLock* op)
-{
-  Unimplemented();
-}
-
-void LIR_Assembler::emit_profile_call(LIR_OpProfileCall* op)
-{
-  Unimplemented();
-}
-
-void LIR_Assembler::align_backward_branch_target()
-{
-  Unimplemented();
-}
-
-void LIR_Assembler::emit_delay(LIR_OpDelay*)
-{
-  Unimplemented();
-}
-
-void LIR_Assembler::negate(LIR_Opr left, LIR_Opr dest)
-{
-  Unimplemented();
-}
-
-void LIR_Assembler::fxch(int i)
-{
-  Unimplemented();
-}
-
-void LIR_Assembler::fld(int i)
-{
-  Unimplemented();
-}
-
-void LIR_Assembler::ffree(int i)
-{
-  Unimplemented();
-}
-
-void LIR_Assembler::rt_call(LIR_Opr result, address dest,
-                            const LIR_OprList* args, LIR_Opr tmp,
-                            CodeEmitInfo* info) {
-  Unimplemented();
-}
-
-void LIR_Assembler::volatile_move_op(LIR_Opr src, LIR_Opr dest,
-                                     BasicType type, CodeEmitInfo* info) {
-  Unimplemented();
-}
-
-void LIR_Assembler::membar()
-{
-  Unimplemented();
-}
-
-void LIR_Assembler::membar_acquire()
-{
-  Unimplemented();
-}
-
-void LIR_Assembler::membar_release()
-{
-  Unimplemented();
-}
-
-void LIR_Assembler::leal(LIR_Opr addr, LIR_Opr dest)
-{
-  Unimplemented();
-}
-
-void LIR_Assembler::get_thread(LIR_Opr result_reg)
-{
-  Unimplemented();
-}
-
-void LIR_Assembler::peephole(LIR_List*)
-{
-  // do nothing for now
-}
-
-void LIR_Assembler::emit_unimplemented(const char* file, int line)
-{
-  __ unimplemented (file, line);
-}

--- a/ports/hotspot/src/cpu/ppc/vm/c1_LIRAssembler_ppc.hpp	Wed Mar 05 08:04:00 2008 -0500
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,35 +0,0 @@
-/*
- * Copyright 2000-2006 Sun Microsystems, Inc.  All Rights Reserved.
- * Copyright 2007 Red Hat, Inc.
- * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
- *
- * This code is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 only, as
- * published by the Free Software Foundation.
- *
- * This code is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
- * version 2 for more details (a copy is included in the LICENSE file that
- * accompanied this code).
- *
- * You should have received a copy of the GNU General Public License version
- * 2 along with this work; if not, write to the Free Software Foundation,
- * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
- * CA 95054 USA or visit www.sun.com if you need additional information or
- * have any questions.
- *
- */
-
- public:
-  enum {
-#ifdef XXX_EVIL_EVIL_EVIL
-    call_stub_size         = 1*K,
-    exception_handler_size = 1*K,
-    deopt_handler_size     = 1*K
-#endif
-  };
-
-  void emit_unimplemented(const char* file, int line);

--- a/ports/hotspot/src/cpu/ppc/vm/c1_LIRGenerator_ppc.cpp	Wed Mar 05 08:04:00 2008 -0500
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,490 +0,0 @@
-/*
- * Copyright 2005-2006 Sun Microsystems, Inc.  All Rights Reserved.
- * Copyright 2007 Red Hat, Inc.
- * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
- *
- * This code is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 only, as
- * published by the Free Software Foundation.
- *
- * This code is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
- * version 2 for more details (a copy is included in the LICENSE file that
- * accompanied this code).
- *
- * You should have received a copy of the GNU General Public License version
- * 2 along with this work; if not, write to the Free Software Foundation,
- * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
- * CA 95054 USA or visit www.sun.com if you need additional information or
- * have any questions.
- *
- */
-
-#include "incls/_precompiled.incl"
-#include "incls/_c1_LIRGenerator_ppc.cpp.incl"
-
-#ifdef ASSERT
-#define __ gen()->lir(__FILE__, __LINE__)->
-#else
-#define __ gen()->lir()->
-#endif
-
-void LIRItem::load_byte_item()
-{
-  // byte loads use same registers as other loads
-  load_item();
-}
-
-void LIRItem::load_nonconstant()
-{
-  LIR_Opr r = value()->operand();
-  if (r->is_constant()) {
-    // XXX sparc has some extra stuff here
-    _result = r;
-  } else {
-    load_item();
-  }
-}
-
-//--------------------------------------------------------------
-//               LIRGenerator
-//--------------------------------------------------------------
-
-LIR_Opr LIRGenerator::exceptionOopOpr()
-{
-  Unimplemented();
-}
-
-LIR_Opr LIRGenerator::exceptionPcOpr()
-{
-  Unimplemented();
-}
-
-LIR_Opr LIRGenerator::syncTempOpr()
-{
-  Unimplemented();
-}
-
-LIR_Opr LIRGenerator::getThreadTemp()
-{
-  Unimplemented();
-}
-
-LIR_Opr LIRGenerator::result_register_for(ValueType* type, bool callee)
-{
-  LIR_Opr opr;
-
-  switch (type->tag()) {
-  case intTag:
-    opr = FrameMap::gpr_opr[3];
-    break;
-
-  case objectTag:
-    opr = FrameMap::gpr_oop_opr[3];
-    break;
-
-  case longTag:
-    Unimplemented();
-    break;
-
-  case floatTag:
-    Unimplemented();
-    break;
-
-  case doubleTag:
-    Unimplemented();
-    break;
-    
-  default:
-    ShouldNotReachHere();
-  }
-
-  assert(opr->type_field() == as_OprType(as_BasicType(type)), "type mismatch");
-  return opr;
-}
-
-LIR_Opr LIRGenerator::rlock_byte(BasicType type)
-{
-  Unimplemented();
-}
-
-
-//--------- loading items into registers --------------------------------
-
-bool LIRGenerator::can_store_as_constant(Value v, BasicType type) const
-{
-  return false;
-}
-
-bool LIRGenerator::can_inline_as_constant(Value v) const
-{
-  if (v->type()->as_IntConstant() != NULL) {
-    return Assembler::is_simm16(v->type()->as_IntConstant()->value());
-  }
-  return false;
-}
-
-bool LIRGenerator::can_inline_as_constant(LIR_Const* c) const
-{
-  if (c->type() == T_INT) {
-    return Assembler::is_simm16(c->as_jint());
-  }
-  return false;
-}
-
-LIR_Opr LIRGenerator::safepoint_poll_register()
-{
-  Unimplemented();
-}
-
-LIR_Address* LIRGenerator::generate_address(LIR_Opr base, LIR_Opr index,
-                                            int shift, int disp,
-                                            BasicType type) {
-  assert(base->is_register(), "must be");
-
-  // accumulate fixed displacements
-  if (index->is_constant()) {
-    disp += index->as_constant_ptr()->as_jint() << shift;
-    index = LIR_OprFact::illegalOpr;
-  }
-
-  if (index->is_register()) {
-    // apply the shift and accumulate the displacement
-    if (shift > 0) {
-      LIR_Opr tmp = new_register(T_INT);
-      __ shift_left(index, shift, tmp);
-      index = tmp;
-    }
-    if (disp != 0) {
-      LIR_Opr tmp = new_register(T_INT);
-      if (Assembler::is_simm16(disp)) {
-        __ add(index, LIR_OprFact::intConst(disp), tmp);
-        index = tmp;
-      }
-      else {
-        __ move(LIR_OprFact::intConst(disp), tmp);
-        __ add(tmp, index, tmp);
-        index = tmp;
-      }
-      disp = 0;
-    }
-  }
-  else if (disp != 0 && !Assembler::is_simm16(disp)) {
-    // need to load the displacement into a register
-    index = new_register(T_INT);
-    __ move(LIR_OprFact::intConst(disp), index);
-    disp = 0;
-  }
-
-  // at this point we either have base + index or base + displacement
-  if (disp == 0) {
-    return new LIR_Address(base, index, type);
-  }
-  else {
-    assert(Assembler::is_simm16(disp), "must be");
-    return new LIR_Address(base, disp, type);
-  }
-}
-
-LIR_Address* LIRGenerator::emit_array_address(LIR_Opr array_opr,
-                                              LIR_Opr index_opr,
-                                              BasicType type,
-                                              bool needs_card_mark) {
-  int elem_size = type2aelembytes[type];
-  int shift = exact_log2(elem_size);
-
-  LIR_Opr base_opr;
-  int offset = arrayOopDesc::base_offset_in_bytes(type);
-
-  if (index_opr->is_constant()) {
-    Unimplemented();
-  }
-  else {
-#ifdef PPC64
-    if (index_opr->type() == T_INT) {
-      LIR_Opr tmp = new_register(T_LONG);
-      __ convert(Bytecodes::_i2l, index_opr, tmp);
-      index_opr = tmp;
-    }
-#endif
-
-    base_opr = new_pointer_register();
-    assert (index_opr->is_register(), "Must be register");
-    if (shift > 0) {
-      __ shift_left(index_opr, shift, base_opr);
-      __ add(base_opr, array_opr, base_opr);
-    } else {
-      __ add(index_opr, array_opr, base_opr);
-    }
-  }
-
-  if (needs_card_mark) {
-    Unimplemented();
-  }
-  else {
-    return new LIR_Address(base_opr, offset, type);
-  }
-}
-
-void LIRGenerator::increment_counter(address counter, int step)
-{
-  Unimplemented();
-}
-
-void LIRGenerator::increment_counter(LIR_Address* addr, int step)
-{
-  Unimplemented();
-}
-
-void LIRGenerator::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp,
-                               int c, CodeEmitInfo* info)
-{
-  Unimplemented();
-}
-
-void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg,
-                               LIR_Opr base, int disp, BasicType type,
-                               CodeEmitInfo* info)
-{
-  __ unimplemented (__FILE__, __LINE__);
-}
-
-void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg,
-                               LIR_Opr base, LIR_Opr disp, BasicType type,
-                               CodeEmitInfo* info)
-{
-  Unimplemented();
-}
-
-bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, int c,
-                                            LIR_Opr result, LIR_Opr tmp) {
-  assert(left != result, "should be different registers");
-  if (is_power_of_2(c + 1)) {
-    __ shift_left(left, log2_intptr(c + 1), result);
-    __ sub(result, left, result);
-    return true;
-  } else if (is_power_of_2(c - 1)) {
-    __ shift_left(left, log2_intptr(c - 1), result);
-    __ add(result, left, result);
-    return true;
-  }
-  return false;
-}
-
-//----------------------------------------------------------------------
-//             visitor functions
-//----------------------------------------------------------------------
-
-void LIRGenerator::do_StoreIndexed(StoreIndexed* x)
-{
-  Unimplemented();
-}
-
-void LIRGenerator::do_MonitorEnter(MonitorEnter* x)
-{
-  Unimplemented();
-}
-
-void LIRGenerator::do_MonitorExit(MonitorExit* x)
-{
-  Unimplemented();
-}
-
-// _ineg, _lneg, _fneg, _dneg
-void LIRGenerator::do_NegateOp(NegateOp* x)
-{
-  Unimplemented();
-}
-
-// for  _fadd, _fmul, _fsub, _fdiv, _frem
-//      _dadd, _dmul, _dsub, _ddiv, _drem
-void LIRGenerator::do_ArithmeticOp_FPU(ArithmeticOp* x)
-{
-  Unimplemented();
-}
-  
-// for  _ladd, _lmul, _lsub, _ldiv, _lrem
-void LIRGenerator::do_ArithmeticOp_Long(ArithmeticOp* x)
-{
-  Unimplemented();
-}
-
-// for: _iadd, _imul, _isub, _idiv, _irem
-void LIRGenerator::do_ArithmeticOp_Int(ArithmeticOp* x)
-{
-  LIRItem left(x->x(), this);
-  LIRItem right(x->y(), this);
-  // missing test if instr is commutative and if we should swap
-  right.load_nonconstant();
-  assert(right.is_constant() || right.is_register(), "wrong state of right");
-  left.load_item();
-  rlock_result(x);
-  if (x->op() == Bytecodes::_idiv || x->op() == Bytecodes::_irem) {
-    Unimplemented();
-  }
-  else {
-    // XXX x86 uses shift for some multiplies here
-    arithmetic_op_int(x->op(), x->operand(), left.result(), right.result(),
-                      LIR_OprFact::illegalOpr);
-  }
-}
-
-void LIRGenerator::do_ArithmeticOp(ArithmeticOp* x)
-{
-  ValueTag tag = x->type()->tag();
-  assert(x->x()->type()->tag() == tag &&
-         x->y()->type()->tag() == tag, "wrong parameters");
-
-  switch (tag) {
-  case floatTag:
-  case doubleTag:
-    do_ArithmeticOp_FPU(x);
-    break;
-
-  case longTag:
-    do_ArithmeticOp_Long(x);
-    break;
-
-  case intTag:
-    do_ArithmeticOp_Int(x);
-    break;
-
-  default:
-    ShouldNotReachHere();    
-  }
-}
-
-// _ishl, _lshl, _ishr, _lshr, _iushr, _lushr
-void LIRGenerator::do_ShiftOp(ShiftOp* x)
-{
-  Unimplemented();
-}
-
-// _iand, _land, _ior, _lor, _ixor, _lxor
-void LIRGenerator::do_LogicOp(LogicOp* x)
-{
-  Unimplemented();
-}
-
-// _lcmp, _fcmpl, _fcmpg, _dcmpl, _dcmpg
-void LIRGenerator::do_CompareOp(CompareOp* x)
-{
-  Unimplemented();
-}
-
-void LIRGenerator::do_AttemptUpdate(Intrinsic* x)
-{
-  Unimplemented();
-}
-
-void LIRGenerator::do_CompareAndSwap(Intrinsic* x, ValueType* type)
-{
-  Unimplemented();
-}
-
-void LIRGenerator::do_MathIntrinsic(Intrinsic* x)
-{
-  Unimplemented();
-}
-
-void LIRGenerator::do_ArrayCopy(Intrinsic* x)
-{
-  Unimplemented();
-}
-
-// _i2l, _i2f, _i2d, _l2i, _l2f, _l2d,
-// _f2i, _f2l, _f2d, _d2i, _d2l, _d2f,
-// _i2b, _i2c, _i2s
-void LIRGenerator::do_Convert(Convert* x)
-{
-  Unimplemented();
-}
-
-void LIRGenerator::do_NewInstance(NewInstance* x)
-{
-  if (PrintNotLoaded && !x->klass()->is_loaded()) {
-    tty->print_cr("   ###class not loaded at new bci %d", x->bci());
-  }
-  CodeEmitInfo* info = state_for(x, x->state());
-  const LIR_Opr reg = result_register_for(x->type());
-  LIR_Opr klass_reg = new_register(objectType);
-  new_instance(reg, x->klass(),
-               LIR_OprFact::illegalOpr,
-               LIR_OprFact::illegalOpr,
-               LIR_OprFact::illegalOpr,
-               LIR_OprFact::illegalOpr, klass_reg, info);
-  LIR_Opr result = rlock_result(x);
-  __ move(reg, result);
-}
-
-void LIRGenerator::do_NewTypeArray(NewTypeArray* x)
-{
-  Unimplemented();
-}
-
-void LIRGenerator::do_NewObjectArray(NewObjectArray* x)
-{
-  Unimplemented();
-}
-
-void LIRGenerator::do_NewMultiArray(NewMultiArray* x)
-{
-  Unimplemented();
-}
-
-void LIRGenerator::do_BlockBegin(BlockBegin* x)
-{
-  __ unimplemented (__FILE__, __LINE__);
-}
-
-void LIRGenerator::do_CheckCast(CheckCast* x)
-{
-  Unimplemented();
-}
-
-void LIRGenerator::do_InstanceOf(InstanceOf* x)
-{
-  Unimplemented();
-}
-
-void LIRGenerator::do_If(If* x)
-{
-  __ unimplemented(__FILE__, __LINE__);
-}
-
-LIR_Opr LIRGenerator::getThreadPointer()
-{
-  Unimplemented();
-}
-
-void LIRGenerator::trace_block_entry(BlockBegin* block)
-{
-  Unimplemented();
-}
-
-void LIRGenerator::volatile_field_store(LIR_Opr value, LIR_Address* address,
-                                        CodeEmitInfo* info)
-{
-  Unimplemented();
-}
-
-void LIRGenerator::volatile_field_load(LIR_Address* address, LIR_Opr result,
-                                       CodeEmitInfo* info)
-{
-  Unimplemented();
-}
-
-void LIRGenerator::put_Object_unsafe(LIR_Opr src, LIR_Opr offset, LIR_Opr data,
-                                     BasicType type, bool is_volatile)
-{
-  Unimplemented();
-}
-
-void LIRGenerator::get_Object_unsafe(LIR_Opr dst, LIR_Opr src, LIR_Opr offset,
-                                     BasicType type, bool is_volatile)
-{
-  Unimplemented();
-}