changeset 21:d0a60cd6d61c

Fix a bug caused by the MIPS ABI. When passing arguments, the stack adjusting is not according to the MIPS ABI. Fixed it.
author LIN Chuanwen <linchuanwen@loongson.cn>
date Mon, 01 Nov 2010 17:45:37 +0800
parents 7a9f890eafef
children a7a1c6bde40a
files hotspot/src/cpu/mips/vm/templateInterpreter_mips.cpp
diffstat 1 files changed, 4 insertions(+), 1 deletions(-) [+]
line wrap: on
line diff
--- a/hotspot/src/cpu/mips/vm/templateInterpreter_mips.cpp	Mon Nov 01 17:41:18 2010 +0800
+++ b/hotspot/src/cpu/mips/vm/templateInterpreter_mips.cpp	Mon Nov 01 17:45:37 2010 +0800
@@ -1054,7 +1054,10 @@
 	__ sw(t, AT, 0);  
 */	
 	__ shl(t, 3);
-	__ addi(t,t,2*wordSize);//for JNIEnv and mirror	
+	// MIPS ABI must allocate 4 Words for register a0-a3
+	// even if the number of arguments is less than 4
+	// we add 4*wordSize, including 2 words for JNIEnv and mirror
+	__ addi(t,t,4*wordSize);
 	__ sub(SP, SP, t);
 	__ move(AT, -8);
 	__ andr(SP, SP, AT);