changeset 9758:daec938536a5

Cleanup code in src/cpu/x86, minimizes differences between Shenandoah and upstream.
author rkennke
date Wed, 30 Sep 2015 22:24:07 +0200
parents 98308cb043ca
children b2c1cf8bd981
files src/cpu/x86/vm/c1_LIRAssembler_x86.cpp src/cpu/x86/vm/c1_LIRGenerator_x86.cpp src/cpu/x86/vm/c1_MacroAssembler_x86.cpp src/cpu/x86/vm/templateTable_x86.cpp
diffstat 4 files changed, 33 insertions(+), 55 deletions(-) [+]
line wrap: on
line diff
--- a/src/cpu/x86/vm/c1_LIRAssembler_x86.cpp	Wed Sep 30 22:24:06 2015 +0200
+++ b/src/cpu/x86/vm/c1_LIRAssembler_x86.cpp	Wed Sep 30 22:24:07 2015 +0200
@@ -261,6 +261,7 @@
   }
 }
 
+
 Address LIR_Assembler::as_Address_hi(LIR_Address* addr) {
   Address base = as_Address(addr);
   return Address(base._base, base._index, base._scale, base._disp + BytesPerWord);
@@ -271,6 +272,7 @@
   return as_Address(addr);
 }
 
+
 void LIR_Assembler::osr_entry() {
   offsets()->set_value(CodeOffsets::OSR_Entry, code_offset());
   BlockBegin* osr_entry = compilation()->hir()->osr_entry();
@@ -808,7 +810,7 @@
       } else {
         if (is_literal_address(addr)) {
           ShouldNotReachHere();
-          __ movoop(as_Address(addr), c->as_jobject());
+          __ movoop(as_Address(addr, noreg), c->as_jobject());
         } else {
 #ifdef _LP64
           __ movoop(rscratch1, c->as_jobject());
@@ -1016,36 +1018,34 @@
 #endif
   }
 
-  int null_check_here = code_offset();
-  Address addr = as_Address(to_addr);
-
   if (patch_code != lir_patch_none) {
     patch = new PatchingStub(_masm, PatchingStub::access_field_id);
-    Address toa = addr;
+    Address toa = as_Address(to_addr);
     assert(toa.disp() != 0, "must have");
   }
 
+  int null_check_here = code_offset();
   switch (type) {
     case T_FLOAT: {
       if (src->is_single_xmm()) {
-        __ movflt(addr, src->as_xmm_float_reg());
+        __ movflt(as_Address(to_addr), src->as_xmm_float_reg());
       } else {
         assert(src->is_single_fpu(), "must be");
         assert(src->fpu_regnr() == 0, "argument must be on TOS");
-        if (pop_fpu_stack)      __ fstp_s(addr);
-        else                    __ fst_s (addr);
+        if (pop_fpu_stack)      __ fstp_s(as_Address(to_addr));
+        else                    __ fst_s (as_Address(to_addr));
       }
       break;
     }
 
     case T_DOUBLE: {
       if (src->is_double_xmm()) {
-        __ movdbl(addr, src->as_xmm_double_reg());
+        __ movdbl(as_Address(to_addr), src->as_xmm_double_reg());
       } else {
         assert(src->is_double_fpu(), "must be");
         assert(src->fpu_regnrLo() == 0, "argument must be on TOS");
-        if (pop_fpu_stack)      __ fstp_d(addr);
-        else                    __ fst_d (addr);
+        if (pop_fpu_stack)      __ fstp_d(as_Address(to_addr));
+        else                    __ fst_d (as_Address(to_addr));
       }
       break;
     }
@@ -1053,9 +1053,9 @@
     case T_ARRAY:   // fall through
     case T_OBJECT:  // fall through
       if (UseCompressedOops && !wide) {
-        __ movl(addr, compressed_src);
+        __ movl(as_Address(to_addr), compressed_src);
       } else {
-        __ movptr(addr, src->as_register());
+        __ movptr(as_Address(to_addr), src->as_register());
       }
       break;
     case T_METADATA:
@@ -1064,20 +1064,20 @@
       // compressed klass ptrs: T_METADATA can be a compressed klass
       // ptr or a 64 bit method pointer.
       LP64_ONLY(ShouldNotReachHere());
-      __ movptr(addr, src->as_register());
+      __ movptr(as_Address(to_addr), src->as_register());
       break;
     case T_ADDRESS:
-      __ movptr(addr, src->as_register());
+      __ movptr(as_Address(to_addr), src->as_register());
       break;
     case T_INT:
-      __ movl(addr, src->as_register());
+      __ movl(as_Address(to_addr), src->as_register());
       break;
 
     case T_LONG: {
       Register from_lo = src->as_register_lo();
       Register from_hi = src->as_register_hi();
 #ifdef _LP64
-      __ movptr(addr, from_lo);
+      __ movptr(as_Address_lo(to_addr), from_lo);
 #else
       Register base = to_addr->base()->as_register();
       Register index = noreg;
@@ -1111,7 +1111,7 @@
     case T_BYTE:    // fall through
     case T_BOOLEAN: {
       Register src_reg = src->as_register();
-      Address dst_addr = addr;
+      Address dst_addr = as_Address(to_addr);
       assert(VM_Version::is_P6() || src_reg->has_byte_register(), "must use byte registers if not P6");
       __ movb(dst_addr, src_reg);
       break;
@@ -1119,7 +1119,7 @@
 
     case T_CHAR:    // fall through
     case T_SHORT:
-      __ movw(addr, src->as_register());
+      __ movw(as_Address(to_addr), src->as_register());
       break;
 
     default:
@@ -1218,10 +1218,6 @@
   assert(dest->is_register(), "should not call otherwise");
 
   LIR_Address* addr = src->as_address_ptr();
-
-  if (info != NULL) {
-    add_debug_info_for_null_check_here(info);
-  }
   Address from_addr = as_Address(addr);
 
   if (addr->base()->type() == T_OBJECT) {
@@ -1299,7 +1295,7 @@
       Register to_lo = dest->as_register_lo();
       Register to_hi = dest->as_register_hi();
 #ifdef _LP64
-      __ movptr(to_lo, from_addr);
+      __ movptr(to_lo, as_Address_lo(addr));
 #else
       Register base = addr->base()->as_register();
       Register index = noreg;
@@ -3420,7 +3416,6 @@
         __ movl(tmp, Address(tmp, Klass::super_check_offset_offset()));
         __ push(tmp);
         __ push(length);
-
         __ lea(tmp, Address(dst, dst_pos, scale, arrayOopDesc::base_offset_in_bytes(basic_type)));
         __ push(tmp);
         __ lea(tmp, Address(src, src_pos, scale, arrayOopDesc::base_offset_in_bytes(basic_type)));
@@ -4073,11 +4068,10 @@
 
   if (data->type() == T_INT) {
     if (code == lir_xadd) {
-      Address addr = as_Address(src->as_address_ptr());
       if (os::is_MP()) {
         __ lock();
       }
-      __ xaddl(addr, data->as_register());
+      __ xaddl(as_Address(src->as_address_ptr()), data->as_register());
     } else {
       __ xchgl(data->as_register(), as_Address(src->as_address_ptr()));
     }
@@ -4099,11 +4093,10 @@
 #ifdef _LP64
     assert(data->as_register_lo() == data->as_register_hi(), "should be a single register");
     if (code == lir_xadd) {
-      Address addr = as_Address(src->as_address_ptr());
       if (os::is_MP()) {
         __ lock();
       }
-      __ xaddq(addr, data->as_register_lo());
+      __ xaddq(as_Address(src->as_address_ptr()), data->as_register_lo());
     } else {
       __ xchgq(data->as_register_lo(), as_Address(src->as_address_ptr()));
     }
--- a/src/cpu/x86/vm/c1_LIRGenerator_x86.cpp	Wed Sep 30 22:24:06 2015 +0200
+++ b/src/cpu/x86/vm/c1_LIRGenerator_x86.cpp	Wed Sep 30 22:24:07 2015 +0200
@@ -303,11 +303,9 @@
   LIR_Opr ary = array.result();
   ary = shenandoah_write_barrier(ary, null_check_info, x->needs_null_check());
   LIR_Opr val = value.result();
-  if (obj_store) {
+  if (obj_store && UseShenandoahGC) {
     if (! val->is_register()) {
-      LIR_Opr tmp = new_register(T_OBJECT);
-      __ move(val, tmp);
-      val = tmp;
+      assert(val->is_constant(), "expect constant");
     }
     val = shenandoah_read_barrier(val, NULL, true);
   }
@@ -371,7 +369,7 @@
   // object is already locked (xhandlers expect object to be unlocked)
   CodeEmitInfo* info = state_for(x, x->state(), true);
   LIR_Opr obj_opr = obj.result();
-  obj_opr = shenandoah_write_barrier(obj_opr, state_for(x/*, x->state_before()*/), x->needs_null_check());
+  obj_opr = shenandoah_write_barrier(obj_opr, state_for(x), x->needs_null_check());
   monitor_enter(obj_opr, lock, syncTempOpr(), scratch,
                         x->monitor_no(), info_for_exception, info);
 }
@@ -917,9 +915,9 @@
   LIRItem length(x->argument_at(4), this);
 
   LIR_Opr dst_op = dst.result();
-  dst_op = shenandoah_write_barrier(dst_op, info, x->arg_needs_null_check(2) /* (flags & LIR_OpArrayCopy::dst_null_check) != 0 */);
+  dst_op = shenandoah_write_barrier(dst_op, info, x->arg_needs_null_check(2));
   LIR_Opr src_op = src.result();
-  src_op = shenandoah_read_barrier(src_op, info, x->arg_needs_null_check(0) /*(flags & LIR_OpArrayCopy::src_null_check) != 0 */);
+  src_op = shenandoah_read_barrier(src_op, info, x->arg_needs_null_check(0));
 
   // operands for arraycopy must use fixed registers, otherwise
   // LinearScan will fail allocation (because arraycopy always needs a
--- a/src/cpu/x86/vm/c1_MacroAssembler_x86.cpp	Wed Sep 30 22:24:06 2015 +0200
+++ b/src/cpu/x86/vm/c1_MacroAssembler_x86.cpp	Wed Sep 30 22:24:07 2015 +0200
@@ -109,7 +109,6 @@
   if (UseBiasedLocking) {
     // load object
     movptr(obj, Address(disp_hdr, BasicObjectLock::obj_offset_in_bytes()));
-
     biased_locking_exit(obj, hdr, done);
   }
 
--- a/src/cpu/x86/vm/templateTable_x86.cpp	Wed Sep 30 22:24:06 2015 +0200
+++ b/src/cpu/x86/vm/templateTable_x86.cpp	Wed Sep 30 22:24:07 2015 +0200
@@ -3056,9 +3056,7 @@
   // btos
   {
     __ pop(btos);
-    if (!is_static) {
-      pop_and_check_object(obj);
-    }
+    if (!is_static) pop_and_check_object(obj);
     oopDesc::bs()->interpreter_write_barrier(_masm, obj);
     __ movb(field, rax);
     if (!is_static && rc == may_rewrite) {
@@ -3074,9 +3072,7 @@
   // atos
   {
     __ pop(atos);
-    if (!is_static) {
-      pop_and_check_object(obj);
-    }
+    if (!is_static) pop_and_check_object(obj);
     oopDesc::bs()->interpreter_write_barrier(_masm, obj);
     // Store into the field
     do_oop_store(_masm, field, rax, _bs->kind(), false);
@@ -3093,9 +3089,7 @@
   // itos
   {
     __ pop(itos);
-    if (!is_static) {
-      pop_and_check_object(obj);
-    }
+    if (!is_static) pop_and_check_object(obj);
     oopDesc::bs()->interpreter_write_barrier(_masm, obj);
     __ movl(field, rax);
     if (!is_static && rc == may_rewrite) {
@@ -3111,9 +3105,7 @@
   // ctos
   {
     __ pop(ctos);
-    if (!is_static) {
-      pop_and_check_object(obj);
-    }
+    if (!is_static) pop_and_check_object(obj);
     oopDesc::bs()->interpreter_write_barrier(_masm, obj);
     __ movw(field, rax);
     if (!is_static && rc == may_rewrite) {
@@ -3129,9 +3121,7 @@
   // stos
   {
     __ pop(stos);
-    if (!is_static) {
-      pop_and_check_object(obj);
-    }
+    if (!is_static) pop_and_check_object(obj);
     oopDesc::bs()->interpreter_write_barrier(_masm, obj);
     __ movw(field, rax);
     if (!is_static && rc == may_rewrite) {
@@ -3148,9 +3138,7 @@
 #ifdef _LP64
   {
     __ pop(ltos);
-    if (!is_static) {
-      pop_and_check_object(obj);
-    }
+    if (!is_static) pop_and_check_object(obj);
     oopDesc::bs()->interpreter_write_barrier(_masm, obj);
     __ movq(field, rax);
     if (!is_static && rc == may_rewrite) {