Mercurial > hg > icedtea9-forest > hotspot
changeset 2624:6ae7a1561b53
6990015: Incorrect Icache line size is used for 64 bit x86
Summary: correct Icache::line_size for x64 and add verification code into vm_version_x86.
Reviewed-by: never, phh
| author | kvn |
|---|---|
| date | Tue, 28 Jun 2011 15:04:39 -0700 |
| parents | 498c6cf70f7e |
| children | e3cbc9ddd434 |
| files | src/cpu/x86/vm/icache_x86.hpp src/cpu/x86/vm/vm_version_x86.cpp src/cpu/x86/vm/vm_version_x86.hpp |
| diffstat | 3 files changed, 19 insertions(+), 3 deletions(-) [+] |
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--- a/src/cpu/x86/vm/icache_x86.hpp Tue Jun 28 14:30:27 2011 -0700 +++ b/src/cpu/x86/vm/icache_x86.hpp Tue Jun 28 15:04:39 2011 -0700 @@ -43,8 +43,8 @@ #ifdef AMD64 enum { stub_size = 64, // Size of the icache flush stub in bytes - line_size = 32, // Icache line size in bytes - log2_line_size = 5 // log2(line_size) + line_size = 64, // Icache line size in bytes + log2_line_size = 6 // log2(line_size) }; // Use default implementation
--- a/src/cpu/x86/vm/vm_version_x86.cpp Tue Jun 28 14:30:27 2011 -0700 +++ b/src/cpu/x86/vm/vm_version_x86.cpp Tue Jun 28 15:04:39 2011 -0700 @@ -321,6 +321,20 @@ if (UseSSE < 2) UseSSE = 2; #endif +#ifdef AMD64 + // flush_icache_stub have to be generated first. + // That is why Icache line size is hard coded in ICache class, + // see icache_x86.hpp. It is also the reason why we can't use + // clflush instruction in 32-bit VM since it could be running + // on CPU which does not support it. + // + // The only thing we can do is to verify that flushed + // ICache::line_size has correct value. + guarantee(_cpuid_info.std_cpuid1_edx.bits.clflush != 0, "clflush is not supported"); + // clflush_size is size in quadwords (8 bytes). + guarantee(_cpuid_info.std_cpuid1_ebx.bits.clflush_size == 8, "such clflush size is not supported"); +#endif + // If the OS doesn't support SSE, we can't use this feature even if the HW does if (!os::supports_sse()) _cpuFeatures &= ~(CPU_SSE|CPU_SSE2|CPU_SSE3|CPU_SSSE3|CPU_SSE4A|CPU_SSE4_1|CPU_SSE4_2);