--- a/src/cpu/aarch64/vm/globals_aarch64.hpp	Mon Nov 17 23:09:36 2014 +0000
+++ b/src/cpu/aarch64/vm/globals_aarch64.hpp	Tue Nov 18 14:20:24 2014 +0000
@@ -95,11 +95,13 @@
          "constant pool is close to instructions")                      \
                                                                         \
   notproduct(bool, UseAcqRelForVolatileFields, false,			\
-	     "Use acquire and release insns for volatile fields")
+	     "Use acquire and release insns for volatile fields")       \
+                                                                        \
+  product(bool, UseCRC32, false,                                        \
+          "Use CRC32 instructions for CRC32 computation")               \
 
 // Don't attempt to use Neon on builtin sim until builtin sim supports it
 #define UseNeon false
-#define UseCRC32 false
 
 #else
 #define UseBuiltinSim		false

--- a/src/cpu/aarch64/vm/vm_version_aarch64.cpp	Mon Nov 17 23:09:36 2014 +0000
+++ b/src/cpu/aarch64/vm/vm_version_aarch64.cpp	Tue Nov 18 14:20:24 2014 +0000
@@ -38,6 +38,9 @@
 #ifndef BUILTIN_SIM
 #include <sys/auxv.h>
 #include <asm/hwcap.h>
+#else
+#define getauxval(hwcap) 0
+#endif
 
 #ifndef HWCAP_AES
 #define HWCAP_AES   (1<<3)
@@ -55,8 +58,6 @@
 #define HWCAP_CRC32 (1<<7)
 #endif
 
-#endif
-
 int VM_Version::_cpu;
 int VM_Version::_model;
 int VM_Version::_stepping;
@@ -118,7 +119,6 @@
   FLAG_SET_DEFAULT(PrefetchCopyIntervalInBytes, 256);
   FLAG_SET_DEFAULT(UseSSE42Intrinsics, true);
 
-#ifndef BUILTIN_SIM
   unsigned long auxv = getauxval(AT_HWCAP);
 
   char buf[512];
@@ -153,20 +153,16 @@
       warning("UseAESIntrinsics specified, but not supported on this CPU");
     }
   }
-#endif
 
   if (FLAG_IS_DEFAULT(UseCRC32Intrinsics)) {
     UseCRC32Intrinsics = true;
   }
 
-#ifndef BUILTIN_SIM
   if (auxv & (HWCAP_SHA1 | HWCAP_SHA2)) {
     if (FLAG_IS_DEFAULT(UseSHA)) {
       FLAG_SET_DEFAULT(UseSHA, true);
     }
-  } else
-#endif
-  if (UseSHA) {
+  } else if (UseSHA) {
     warning("SHA instructions are not available on this CPU");
     FLAG_SET_DEFAULT(UseSHA, false);
   }
@@ -175,9 +171,7 @@
     FLAG_SET_DEFAULT(UseSHA1Intrinsics, false);
     FLAG_SET_DEFAULT(UseSHA256Intrinsics, false);
     FLAG_SET_DEFAULT(UseSHA512Intrinsics, false);
-  }
-#ifndef BUILTIN_SIM
-  else {
+  } else {
     if (auxv & HWCAP_SHA1) {
       if (FLAG_IS_DEFAULT(UseSHA1Intrinsics)) {
         FLAG_SET_DEFAULT(UseSHA1Intrinsics, true);
@@ -199,7 +193,6 @@
       FLAG_SET_DEFAULT(UseSHA512Intrinsics, false);
     }
   }
-#endif
 
 #ifdef COMPILER2
   if (FLAG_IS_DEFAULT(OptoScheduling)) {