view hotspot/src/cpu/mips/vm/assembler_mips.inline.hpp @ 1:c1e1428eff7c

The preliminary porting to MIPS architecture. With this commit, the interpreter can pass 140/141 regression tests, 8/8 SPECjvm98 tests and 31/37 SPECjvm2008 tests. The compiler can pass 136/141 regression tests, but it can not run the benchmark of SPECjvm98 and SPECjvm2008.
author LIU Qi <liuqi82@gmail.com>
date Thu, 30 Sep 2010 13:48:16 +0800
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/*
 * Copyright 1997-2006 Sun Microsystems, Inc.  All Rights Reserved.
 * Copyright 2010 Lemote, Inc.  All Rights Reserved.
 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
 *
 * This code is free software; you can redistribute it and/or modify it
 * under the terms of the GNU General Public License version 2 only, as
 * published by the Free Software Foundation.
 *
 * This code is distributed in the hope that it will be useful, but WITHOUT
 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
 * version 2 for more details (a copy is included in the LICENSE file that
 * accompanied this code).
 *
 * You should have received a copy of the GNU General Public License version
 * 2 along with this work; if not, write to the Free Software Foundation,
 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
 *
 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
 * CA 95054 USA or visit www.sun.com if you need additional information or
 * have any questions.
 *
 */

inline void MacroAssembler::pd_patch_instruction(address branch, address target) {
  jint& stub_inst = *(jint*) branch;
  stub_inst = patched_branch(target - branch, stub_inst, 0);
}

#ifndef PRODUCT
inline void MacroAssembler::pd_print_patched_instruction(address branch) {
  jint stub_inst = *(jint*) branch;
  print_instruction(stub_inst);
  ::tty->print("%s", " (unresolved)");
}
#endif // PRODUCT

//inline bool Address::is_simm13(int offset) { return Assembler::is_simm13(disp() + offset); }



inline void Assembler::check_delay() {
# ifdef CHECK_DELAY
//  guarantee( delay_state != at_delay_slot, "must say delayed() when filling delay slot");
  delay_state = no_delay;
# endif
}

inline void Assembler::emit_long(int x) {
  check_delay();
  AbstractAssembler::emit_long(x);
}

inline void Assembler::emit_data(int x, relocInfo::relocType rtype) {
  relocate(rtype);
  emit_long(x);
}

inline void Assembler::emit_data(int x, RelocationHolder const& rspec) {
  relocate(rspec);
  emit_long(x);
}

inline void MacroAssembler::store_int_argument(Register s, Argument &a) {
	if(a.is_Register()) {
		move(a.as_Register(), s);
	} else {
		sw(s, a.as_caller_address());
	}
}

inline void MacroAssembler::store_long_argument(Register s, Argument &a) {
	Argument a1 = a.successor();
	if(a.is_Register() && a1.is_Register()) {
		move(a.as_Register(), s);
		move(a.as_Register(), s);
	} else {
		sd(s, a.as_caller_address());
	}
}

/*inline void MacroAssembler::store_float_argument(Register s, Argument &a) {
	if(a.is_Register()) {
		mov_s(a.as_FloatRegister(), s);
	} else {
		swc1(s, a.as_caller_address());
	}
}

inline void MacroAssembler::store_double_argument(Register s, Argument &a) {
	if(a.is_Register()) {
		mov_d(a.as_FloatRegister(), s);
	} else {
		sdc1(s, a.as_caller_address());
	}
}*/

inline void MacroAssembler::store_ptr_argument(Register s, Argument &a) {
	if(a.is_Register()) {
		move(a.as_Register(), s);
	} else {

		st_ptr(s, a.as_caller_address());
	}
}
inline void MacroAssembler::ld_ptr(Register rt, Register base, int offset16) {
#ifdef _LP64
  ld(rt, base, offset16);
#else
  lw(rt, base, offset16);
#endif
}
inline void MacroAssembler::ld_ptr(Register rt, Address a) {
#ifdef _LP64
  ld(rt, a.base(), a.disp());
#else
  lw(rt, a.base(), a.disp());
#endif
}

inline void MacroAssembler::st_ptr(Register rt, Address a) {
#ifdef _LP64
  sd(rt, a.base(), a.disp());
#else
  sw(rt, a.base(), a.disp());
#endif
}

inline void MacroAssembler::st_ptr(Register rt, Register base, int offset16) {
#ifdef _LP64
  sd(rt, base, offset16);
#else
  sw(rt, base, offset16);
#endif
}

inline void MacroAssembler::ld_long(Register rt, Register base, int offset16) {
#ifdef _LP64
  ld(rt, base, offset16);
#else
  lw(rt, base, offset16);
#endif
}

inline void MacroAssembler::st_long(Register rt, Register base, int offset16) {
#ifdef _LP64
  sd(rt, base, offset16);
#else
  sw(rt, base, offset16);
#endif
}

inline void MacroAssembler::ld_long(Register rt, Address a) {
#ifdef _LP64
  ld(rt, a.base(), a.disp());
#else
  lw(rt, a.base(), a.disp());
#endif
}

inline void MacroAssembler::st_long(Register rt, Address a) {
#ifdef _LP64
  sd(rt, a.base(), a.disp());
#else
  sw(rt, a.base(), a.disp());
#endif
}

inline void MacroAssembler::addu_long(Register rd, Register rs, Register rt) {
#ifdef _LP64
  daddu(rd, rs, rt);
#else
  addu(rd, rs, rt);
#endif
}

inline void MacroAssembler::addu_long(Register rd, Register rs, long imm32_64) {
#ifdef _LP64
  daddiu(rd, rs, imm32_64);
#else
  addiu(rd, rs, imm32_64);
#endif
}