# HG changeset patch
# User asaha
# Date 1436809777 25200
# Node ID fb157d537278cda4150740e27bb57cd8694e15bf
# Parent  55957789d1907370120233ad83bf60268c5c801b# Parent  dcbeaa94e7fe32e3204402062f29c0ada4bb04a0
Merge

diff -r 55957789d190 -r fb157d537278 .hgtags
--- a/.hgtags	Wed Jul 08 12:12:03 2015 -0700
+++ b/.hgtags	Mon Jul 13 10:49:37 2015 -0700
@@ -679,3 +679,4 @@
 ff8fdeb2fb6d6f3348597339c53412f8f6202c3f hs25.60-b22
 878cb0df27c22c6b1e9f4add1eb3da3edc8ab51d jdk8u60-b22
 0e4094950cd312c8f95c7f37336606323fe049fe jdk8u60-b23
+d89ceecf1bad55e1aee2932b8895d60fc64c15db hs25.60-b23
diff -r 55957789d190 -r fb157d537278 make/hotspot_version
--- a/make/hotspot_version	Wed Jul 08 12:12:03 2015 -0700
+++ b/make/hotspot_version	Mon Jul 13 10:49:37 2015 -0700
@@ -35,7 +35,7 @@
 
 HS_MAJOR_VER=25
 HS_MINOR_VER=60
-HS_BUILD_NUMBER=22
+HS_BUILD_NUMBER=23
 
 JDK_MAJOR_VER=1
 JDK_MINOR_VER=8
diff -r 55957789d190 -r fb157d537278 src/os_cpu/solaris_sparc/vm/vm_version_solaris_sparc.cpp
--- a/src/os_cpu/solaris_sparc/vm/vm_version_solaris_sparc.cpp	Wed Jul 08 12:12:03 2015 -0700
+++ b/src/os_cpu/solaris_sparc/vm/vm_version_solaris_sparc.cpp	Mon Jul 13 10:49:37 2015 -0700
@@ -189,7 +189,7 @@
     return CPUVisitor::visit(nodeh, state);
   }
 
-  PICL(bool is_fujitsu) : _L1_data_cache_line_size(0), _L2_data_cache_line_size(0), _dl_handle(NULL) {
+  PICL(bool is_fujitsu, bool is_sun4v) : _L1_data_cache_line_size(0), _L2_data_cache_line_size(0), _dl_handle(NULL) {
     if (!open_library()) {
       return;
     }
@@ -201,7 +201,7 @@
         if (is_fujitsu) {
           cpu_class = "core";
         }
-        CPUVisitor cpu_visitor(this, os::processor_count());
+        CPUVisitor cpu_visitor(this, (is_sun4v && !is_fujitsu) ? 1 : os::processor_count());
         _picl_walk_tree_by_class(rooth, cpu_class, &cpu_visitor, PICL_visit_cpu_helper);
         if (cpu_visitor.l1_visitor()->is_assigned()) { // Is there a value?
           _L1_data_cache_line_size = cpu_visitor.l1_visitor()->value();
@@ -494,7 +494,7 @@
   }
 
   // Figure out cache line sizes using PICL
-  PICL picl((features & sparc64_family_m) != 0);
+  PICL picl((features & sparc64_family_m) != 0, (features & sun4v_m) != 0);
   _L2_data_cache_line_size = picl.L2_data_cache_line_size();
 
   return features;
diff -r 55957789d190 -r fb157d537278 src/share/vm/gc_implementation/concurrentMarkSweep/concurrentMarkSweepGeneration.cpp
--- a/src/share/vm/gc_implementation/concurrentMarkSweep/concurrentMarkSweepGeneration.cpp	Wed Jul 08 12:12:03 2015 -0700
+++ b/src/share/vm/gc_implementation/concurrentMarkSweep/concurrentMarkSweepGeneration.cpp	Mon Jul 13 10:49:37 2015 -0700
@@ -3339,9 +3339,11 @@
   // Not unloading classes this cycle
   assert(!should_unload_classes(), "Inconsitency!");
 
+  // If we are not unloading classes then add SO_AllCodeCache to root
+  // scanning options.
+  add_root_scanning_option(rso);
+
   if ((!verifying() || unloaded_classes_last_cycle()) && should_verify) {
-    // Include symbols, strings and code cache elements to prevent their resurrection.
-    add_root_scanning_option(rso);
     set_verifying(true);
   } else if (verifying() && !should_verify) {
     // We were verifying, but some verification flags got disabled.