# HG changeset patch # User enevill # Date 1442321991 0 # Node ID 4be0afa7fd02394b4022d07a84ec9ba29c355c26 # Parent b516036ba465f0fa6594edfee0f2bbb177c069f6 8136524: aarch64: test/compiler/runtime/7196199/Test7196199.java fails Summary: Fix safepoint handlers to save 128 bits on vector poll Reviewed-by: kvn Contributed-by: felix.yang@linaro.org diff -r b516036ba465 -r 4be0afa7fd02 src/cpu/aarch64/vm/macroAssembler_aarch64.cpp --- a/src/cpu/aarch64/vm/macroAssembler_aarch64.cpp Wed Aug 26 17:13:59 2015 +0100 +++ b/src/cpu/aarch64/vm/macroAssembler_aarch64.cpp Tue Sep 15 12:59:51 2015 +0000 @@ -2193,18 +2193,30 @@ } #endif -void MacroAssembler::push_CPU_state() { - push(0x3fffffff, sp); // integer registers except lr & sp - +void MacroAssembler::push_CPU_state(bool save_vectors) { + push(0x3fffffff, sp); // integer registers except lr & sp + + if (!save_vectors) { for (int i = 30; i >= 0; i -= 2) stpd(as_FloatRegister(i), as_FloatRegister(i+1), Address(pre(sp, -2 * wordSize))); + } else { + for (int i = 30; i >= 0; i -= 2) + stpq(as_FloatRegister(i), as_FloatRegister(i+1), + Address(pre(sp, -4 * wordSize))); + } } -void MacroAssembler::pop_CPU_state() { - for (int i = 0; i < 32; i += 2) - ldpd(as_FloatRegister(i), as_FloatRegister(i+1), - Address(post(sp, 2 * wordSize))); +void MacroAssembler::pop_CPU_state(bool restore_vectors) { + if (!restore_vectors) { + for (int i = 0; i < 32; i += 2) + ldpd(as_FloatRegister(i), as_FloatRegister(i+1), + Address(post(sp, 2 * wordSize))); + } else { + for (int i = 0; i < 32; i += 2) + ldpq(as_FloatRegister(i), as_FloatRegister(i+1), + Address(post(sp, 4 * wordSize))); + } pop(0x3fffffff, sp); // integer registers except lr & sp } diff -r b516036ba465 -r 4be0afa7fd02 src/cpu/aarch64/vm/macroAssembler_aarch64.hpp --- a/src/cpu/aarch64/vm/macroAssembler_aarch64.hpp Wed Aug 26 17:13:59 2015 +0100 +++ b/src/cpu/aarch64/vm/macroAssembler_aarch64.hpp Tue Sep 15 12:59:51 2015 +0000 @@ -768,8 +768,8 @@ DEBUG_ONLY(void verify_heapbase(const char* msg);) - void push_CPU_state(); - void pop_CPU_state() ; + void push_CPU_state(bool save_vectors = false); + void pop_CPU_state(bool restore_vectors = false) ; // Round up to a power of two void round_to(Register reg, int modulus); diff -r b516036ba465 -r 4be0afa7fd02 src/cpu/aarch64/vm/sharedRuntime_aarch64.cpp --- a/src/cpu/aarch64/vm/sharedRuntime_aarch64.cpp Wed Aug 26 17:13:59 2015 +0100 +++ b/src/cpu/aarch64/vm/sharedRuntime_aarch64.cpp Tue Sep 15 12:59:51 2015 +0000 @@ -74,8 +74,8 @@ // FIXME -- this is used by C1 class RegisterSaver { public: - static OopMap* save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words); - static void restore_live_registers(MacroAssembler* masm); + static OopMap* save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words, bool save_vectors = false); + static void restore_live_registers(MacroAssembler* masm, bool restore_vectors = false); // Offsets into the register save area // Used by deoptimization when it is managing result register @@ -107,7 +107,17 @@ }; -OopMap* RegisterSaver::save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words) { +OopMap* RegisterSaver::save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words, bool save_vectors) { +#ifdef COMPILER2 + if (save_vectors) { + // Save upper half of vector registers + int vect_words = 32 * 8 / wordSize; + additional_frame_words += vect_words; + } +#else + assert(!save_vectors, "vectors are generated only by C2"); +#endif + int frame_size_in_bytes = round_to(additional_frame_words*wordSize + reg_save_size*BytesPerInt, 16); // OopMap frame size is in compiler stack slots (jint's) not bytes or words @@ -121,7 +131,7 @@ // Save registers, fpu state, and flags. __ enter(); - __ push_CPU_state(); + __ push_CPU_state(save_vectors); // Set an oopmap for the call site. This oopmap will map all // oop-registers and debug-info registers as callee-saved. This @@ -138,14 +148,14 @@ // register slots are 8 bytes // wide, 32 floating-point // registers - oop_map->set_callee_saved(VMRegImpl::stack2reg(sp_offset), + oop_map->set_callee_saved(VMRegImpl::stack2reg(sp_offset + additional_frame_slots), r->as_VMReg()); } } for (int i = 0; i < FloatRegisterImpl::number_of_registers; i++) { FloatRegister r = as_FloatRegister(i); - int sp_offset = 2 * i; + int sp_offset = save_vectors ? (4 * i) : (2 * i); oop_map->set_callee_saved(VMRegImpl::stack2reg(sp_offset), r->as_VMReg()); } @@ -153,8 +163,11 @@ return oop_map; } -void RegisterSaver::restore_live_registers(MacroAssembler* masm) { - __ pop_CPU_state(); +void RegisterSaver::restore_live_registers(MacroAssembler* masm, bool restore_vectors) { +#ifndef COMPILER2 + assert(!restore_vectors, "vectors are generated only by C2"); +#endif + __ pop_CPU_state(restore_vectors); __ leave(); } @@ -176,9 +189,9 @@ } // Is vector's size (in bytes) bigger than a size saved by default? -// 16 bytes XMM registers are saved by default using fxsave/fxrstor instructions. +// 8 bytes vector registers are saved by default on AArch64. bool SharedRuntime::is_wide_vector(int size) { - return size > 16; + return size > 8; } // The java_calling_convention describes stack locations as ideal slots on // a frame with no abi restrictions. Since we must observe abi restrictions @@ -2785,7 +2798,7 @@ bool save_vectors = (poll_type == POLL_AT_VECTOR_LOOP); // Save registers, fpu state, and flags - map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words); + map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words, save_vectors); // The following is basically a call_VM. However, we need the precise // address of the call in order to generate an oopmap. Hence, we do all the @@ -2836,7 +2849,7 @@ __ bind(noException); // Normal exit, restore registers and exit. - RegisterSaver::restore_live_registers(masm); + RegisterSaver::restore_live_registers(masm, save_vectors); __ ret(lr);