# HG changeset patch
# User adinn
# Date 1418316123 0
# Node ID 5ad4c09169742e076305193c1e0b8256635cf33e
# Parent  6aed71db871e1f09bad6a7c9d5dfa84163a8c5e6
Add support for A53 multiply accumulate

diff -r 6aed71db871e -r 5ad4c0916974 src/cpu/aarch64/vm/assembler_aarch64.cpp
--- a/src/cpu/aarch64/vm/assembler_aarch64.cpp	Thu Dec 11 15:08:13 2014 +0000
+++ b/src/cpu/aarch64/vm/assembler_aarch64.cpp	Thu Dec 11 16:42:03 2014 +0000
@@ -3056,7 +3056,7 @@
     sdivw(result, ra, rb);
   } else {
     sdivw(scratch, ra, rb);
-    msubw(result, scratch, rb, ra);
+    Assembler::msubw(result, scratch, rb, ra);
   }
 
   return idivl_offset;
diff -r 6aed71db871e -r 5ad4c0916974 src/cpu/aarch64/vm/assembler_aarch64.hpp
--- a/src/cpu/aarch64/vm/assembler_aarch64.hpp	Thu Dec 11 15:08:13 2014 +0000
+++ b/src/cpu/aarch64/vm/assembler_aarch64.hpp	Thu Dec 11 16:42:03 2014 +0000
@@ -2643,6 +2643,16 @@
     umaddl(Rd, Rn, Rm, zr);
   }
 
+#define WRAP(INSN)                                                \
+  void INSN(Register Rd, Register Rn, Register Rm, Register Ra) { \
+    if (Ra != zr) nop();                                          \
+    Assembler::INSN(Rd, Rn, Rm, Ra);                              \
+  }
+
+  WRAP(madd) WRAP(msub) WRAP(maddw) WRAP(msubw)
+  WRAP(smaddl) WRAP(smsubl) WRAP(umaddl) WRAP(umsubl)
+#undef WRAP
+
   // macro assembly operations needed for aarch64
 
   // first two private routines for loading 32 bit or 64 bit constants
diff -r 6aed71db871e -r 5ad4c0916974 src/cpu/aarch64/vm/interp_masm_aarch64.cpp
--- a/src/cpu/aarch64/vm/interp_masm_aarch64.cpp	Thu Dec 11 15:08:13 2014 +0000
+++ b/src/cpu/aarch64/vm/interp_masm_aarch64.cpp	Thu Dec 11 16:42:03 2014 +0000
@@ -1295,7 +1295,7 @@
     // case_array_offset_in_bytes()
     movw(reg2, in_bytes(MultiBranchData::per_case_size()));
     movw(rscratch1, in_bytes(MultiBranchData::case_array_offset()));
-    maddw(index, index, reg2, rscratch1);
+    Assembler::maddw(index, index, reg2, rscratch1);
 
     // Update the case count
     increment_mdp_data_at(mdp,